CAN FD Master-Slave Bus for Distributed LED Lighting Control

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Solution Overview

Problem

Existing vehicle communication systems for sophisticated and distributed lighting systems, such as LED matrices, are costly due to the use of complex and expensive protocol controllers and require accurate clock sources, leading to increased production costs that are not compatible with automotive industry business models.

Innovation Solution

A cost-effective communication network using a master-slave bus interface based on the CAN FD protocol with differential bus wiring, implementing cyclic redundancy check (CRC) and error checking, and a defined edge density for synchronization, which avoids collisions and ensures robustness and safety by using a heartbeat data stream for fault detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If complex and accurate protocol controllers using external components are used to achieve high data rate communication, then communication performance is improved, but production cost increases

Engineering Contradiction:
Improvedata rateVSAvoidproduction cost
Core Design Contradiction:
SpeedVSEase of manufacture

Solution Approach 1:

The patent combines the protocol controller functionality directly into the BCD integrated circuit chip, eliminating the need for separate external protocol controllers. This integration reduces the number of components, simplifies the bill of materials, and lowers production costs while maintaining high data rate communication capabilities through the standardized CAN FD interface

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The BCD integrated circuit is designed to perform multiple functions including LED driver operations, protocol control, and communication handling within a single chip. This multi-functionality eliminates the need for separate dedicated protocol controller components, reducing overall system complexity and production cost

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If accurate clock source (crystal) is used to enable high data rate protocol control, then communication reliability is improved, but device complexity and cost increase

Engineering Contradiction:
Improvecommunication reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The BCD integrated circuit generates its own internal clock signal required for CAN FD communication without needing an external crystal oscillator. This self-service approach eliminates additional components, reduces device complexity, and maintains communication reliability through integrated clock generation

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent removes the external crystal oscillator component from the system by integrating clock generation functionality directly into the BCD chip. This extraction of the external clock source simplifies the overall device architecture while preserving the necessary timing accuracy for high data rate communication

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If differential wiring is adopted for clock and data signals to facilitate robustness, then communication robustness is improved, but wire harness cost increases

Engineering Contradiction:
Improvecommunication robustnessVSAvoidwire harness cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent utilizes the existing differential bus wiring infrastructure of the CAN FD network for both clock synchronization and data transmission by embedding timing information within the data frames. This merging of functions eliminates the need for separate dedicated clock wiring, reducing wire harness complexity and cost while maintaining robust differential signaling

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250355824A1System and method for communication between a commander device and a responder device
Publication Date: 2025.11.20 STMICROELECTRONICS APPL GMBH
  • US20250355824A1 patent drawing
  • US20250355824A1 patent drawing
  • US20250355824A1 patent drawing

AI summary

A device includes a master device, a set of slave devices and a bus. The master device is configured to transmit first messages carrying a set of operation data message portions indicative of operations for implementation by slave devices of the set of slave devices, and second messages addressed to slave devices in the set of slave devices. The second messages convey identifiers identifying respective ones of the slave devices to which the second messages are addressed, requesting respective reactions towards the master device within respective expected reaction intervals. The slave devices are configured to receive the first messages transmitted from the master device, read respective operation data message portions in the set of operation data message portions, implement respective operations as a function of the respective operation data message portions read, and receive the second messages transmitted from the master device.