CAN Physical Layer RC Matching for Resonance and EMC Control

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Solution Overview

Problem

Integrated circuits used in differential network bus nodes face challenges with low frequency resonance and increased power injection due to reduced capacitance in minimal CAN networks, leading to reduced EMC performance, especially at high frequencies, and undesirable oscillations during DPI testing.

Innovation Solution

The integrated circuit incorporates physical layer interface circuits with low and high frequency RC matching circuits to shift low frequency resonance to lower frequencies, reduce its quality factor, and decrease high frequency impedance, thereby reducing power injection and oscillations, implemented within the PAD ring to avoid increasing die size and re-verification of existing IC designs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a minimal CAN network with only two nodes is used, then the equivalent capacitance of the CAN bus is reduced, but this causes a further increase in the amount of power injected on the ICs and reduced EMC performance at high frequencies

Engineering Contradiction:
Improvenetwork configuration efficiencyVSAvoidpower injection and EMC performance degradation
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary circuit between the transceiver and the CAN bus that includes a transformer coupled with RC matching circuits. This intermediary structure isolates the transceiver from the harmful effects of reduced bus capacitance, transforming the impedance characteristics and preventing excessive power injection while maintaining network functionality with minimal nodes

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the electrical parameters at the interface by using a transformer with specific turns ratio and RC matching circuits with carefully selected resistance and capacitance values. This transforms the impedance profile to maintain proper signal levels and reduce power injection even when the bus capacitance is reduced due to minimal node configuration

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a 100 uH CMC is connected with the equivalent capacitance of the IC, then a low frequency resonance around 4 MHz is generated, but this causes an increase in power injected into the IC during DPI tests and can lead to receiver failure

Engineering Contradiction:
Improvecommon mode rejectionVSAvoidpower injection at resonance frequency
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The transformer and RC matching circuits serve as an intermediary that decouples the direct resonance interaction between the CMC and IC capacitance. The transformer's magnetic coupling and the RC circuits' frequency-dependent impedance create a buffer that prevents the formation of a sharp low-frequency resonance peak, thereby reducing power injection during DPI tests while preserving common mode rejection capability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent modifies the resonant circuit parameters by introducing the transformer's leakage inductance and the RC matching circuits' resistance and capacitance. These parameter changes broaden the resonance peak and reduce its quality factor, distributing the energy over a wider frequency range and reducing the peak power injection at the resonant frequency

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If integrated matching networks are added to shift low frequency resonance and decrease high frequency impedance, then immunity performance is improved, but the device complexity increases

Engineering Contradiction:
Improveimmunity performanceVSAvoidinterface circuit structure
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges the matching network functionality directly into the transceiver package by integrating the transformer and RC matching circuits as a unified interface circuit. This combination approach provides comprehensive immunity performance improvement (addressing both low-frequency resonance and high-frequency impedance issues) while containing the complexity increase within a single integrated module rather than adding separate discrete components

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively improves immunity performance by reducing power injection and oscillations, ensuring compliance with EMC standards and enhancing the reliability of differential network bus nodes, particularly in two-node CAN configurations.

Implementation Method 1

A 100 uH CMC together with the equivalent capacitance of the IC can generate a low frequency resonance around 4 MHz

Methodology Applied
Scientific EffectResonance: Resonance

Implementation Method 2

decrease high frequency impedance to decrease the level of power injected into the IC

Methodology Applied
Scientific EffectElectrical Impedance: Electrical Resistance

Data Source

PatentUS11057073B2Integrated circuit with physical layer interface circuit
Publication Date: 2021.07.06 NXP USA INC
  • US11057073B2 patent drawing
  • US11057073B2 patent drawing
  • US11057073B2 patent drawing

AI summary

An integrated circuit for use in a differential network bus node comprising: a transceiver having a first transceiver input-output terminal and a second transceiver input-output terminal; a physical layer high terminal connected to the first transceiver input-output-terminal; a physical layer low terminal connected to the second transceiver input-output terminal; and a physical layer interface circuit comprising: a first low frequency RC matching circuit and a first high frequency RC matching circuit each connected between the first transceiver input-output-terminal and a first reference terminal; and a second low frequency RC matching circuit and a second high frequency RC matching circuit each connected between the second transceiver input-output terminal and a second reference terminal.