CAN Receiver Clock Error Measurement Circuit

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Solution Overview

Problem

Existing CAN receivers require power-hungry crystal oscillators for accurate clock signals, leading to high power consumption, especially in battery-powered systems, as they remain active even when the bus is idle to detect packets.

Innovation Solution

A CAN receiver using a low accuracy clock, implemented on-chip, measures bit timing errors and adjusts sampling times to synchronize with packet timing, eliminating the need for crystal oscillators and reducing power consumption by transitioning to a low power state when idle.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a crystal oscillator is used to provide accurate clock signals for packet detection, then timing accuracy is improved, but power consumption increases

Engineering Contradiction:
Improvetiming accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent changes the operating parameters by using a low-accuracy oscillator with frequency in the range of 100 kHz to 2 MHz instead of a high-accuracy crystal oscillator. The system compensates for timing errors through measurement and adjustment mechanisms, allowing operation with relaxed timing parameters that reduce power consumption while maintaining functional accuracy

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extracts and removes the crystal oscillator component from the system. By eliminating this high-power component and replacing it with a low-accuracy oscillator combined with error measurement and correction circuitry, the system achieves the same functional outcome with significantly reduced power consumption

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If the receiver remains active to detect packets on the bus, then packet detection reliability is improved, but power consumption increases

Engineering Contradiction:
Improvepacket detection reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic sampling of the bus using the low-accuracy oscillator instead of continuous monitoring. The system can enter low-power states between sampling intervals while maintaining the ability to detect packet transmissions, reducing average power consumption while preserving detection reliability

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The low-accuracy oscillator acts as an intermediary that enables the receiver to monitor bus activity with reduced power consumption. Combined with error measurement and correction mechanisms, it mediates between the need for detection reliability and the desire for low power consumption

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11258630B2Controller area network receiver
Publication Date: 2022.02.22 TEXAS INSTRUMENTS INC
  • US11258630B2 patent drawing
  • US11258630B2 patent drawing
  • US11258630B2 patent drawing

AI summary

A controller area network receiver includes a measurement circuit, a filter circuit, and a frame detection circuit. The measurement circuit is coupled to a bit stream input terminal, and includes a timer circuit and error calculation circuitry. The timer circuit is coupled to the bit stream input terminal and a reference clock generator circuit. The error calculation circuitry is coupled to the timer circuit. The filter circuit is coupled to the measurement circuit, and includes error clipping control circuitry and clock period adjustment circuitry. The error clipping control circuitry is coupled to the error calculation circuitry. The clock period adjustment circuitry is coupled to the error calculation circuitry and the timer circuit. The frame detection circuit is coupled to the filter circuit and the bit stream input terminal.