Canary Circuit Timing Violation Detection for Glitch Attacks
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Solution Overview
Problem
Integrated circuits are vulnerable to hardware-associated attacks, particularly glitch attacks that disrupt power/voltage or clock inputs, leading to timing constraint violations and potential data breaches or unauthorized access.
Innovation Solution
Incorporating canary circuits with defined timing constraints that mirror those of functional circuits, these canary circuits detect timing violations caused by glitch attacks and send intrusion signals to monitoring logic, triggering counteractions to prevent data breaches, such as blocking access or resetting the chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If canary circuits are added to detect glitch attacks, then security against hardware attacks is improved, but device complexity increases
Solution Approach 1:
The integrated circuit is divided into functional circuits and separate canary circuits. The canary circuits are dedicated security monitoring units that are segmented from the main functional logic, allowing independent detection and response to glitch attacks without interfering with normal operation.
Solution Approach 2:
Canary circuits act as intermediary monitoring elements between the functional circuits and potential attack vectors. They intercept and analyze timing signals to detect anomalies before they can compromise the main functional circuits, serving as a protective buffer layer.
2Measurement precision
If canary circuits with strict timing constraints are implemented, then detection precision for glitch attacks is improved, but manufacturing precision requirements increase
Solution Approach 1:
The canary circuits are pre-configured with defined timing constraints during the design phase. These timing parameters are established beforehand to be sensitive to glitch attacks while accounting for normal manufacturing variations, allowing the circuits to detect anomalies without requiring extreme manufacturing precision.
Solution Approach 2:
The canary circuits utilize configurable timing parameters that can be adjusted to optimize detection sensitivity. By changing these parameters, the system can distinguish between timing variations due to manufacturing tolerances and those caused by actual glitch attacks, maintaining detection precision without demanding excessive manufacturing precision.
Data Source
AI summary
An IC comprising functional circuit to perform primary functions of the IC is provided. The functional circuit is to enable electrical signals to propagate through it within a timing constraint of the functional circuit. The IC comprises at least one canary circuit used for detecting glitch attacks on the circuit. Electrical signals are to propagate through the canary circuit(s) within a defined timing constraint of the canary circuit(s). The canary circuit is to provide a signal path designed such that in the event of a timing constraint of the functional circuit(s) is violated due to a glitch attack, also the timing constraint of the canary circuit(s) is violated.