Selective Cap Insulator Removal for Uniform Dielectric Constant

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Solution Overview

Problem

Semiconductor manufacturing processes face challenges in reducing impurity absorption by semiconductor wafers due to non-uniform outgassing of impurities from interlayer dielectric (ILD) regions with varying trench densities, leading to dielectric constant variations across the device.

Innovation Solution

A method involving the deposition of a cap insulator layer on the ILD, identifying high and low density regions based on trench concentration, and selectively removing the cap insulator layer from high density regions to ensure uniform impurity distribution and outgassing, using chemical mechanical polishing to adjust polishing rates and control cap insulator layer presence.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a cap insulator layer is deposited on the entire ILD surface, then impurity absorption is reduced uniformly, but dielectric constant variation increases due to non-uniform outgassing in high and low density regions

Engineering Contradiction:
Improveimpurity absorption controlVSAvoiddielectric constant uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by differentiating treatment between high density and low density regions. Cap insulator layers are selectively removed from high density regions (where outgassing is excessive) while maintaining them on low density regions (where outgassing is insufficient). This localized differentiation resolves the contradiction by allowing uniform impurity protection across the entire ILD while compensating for regional outgassing variations to maintain dielectric constant uniformity.

Inventive Principle:
Principle #3Local quality

2Productivity

If trench density is increased to improve device functionality, then device performance improves, but outgassing non-uniformity increases leading to dielectric constant variation

Engineering Contradiction:
Improvedevice functionalityVSAvoiddielectric constant uniformity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary anti-action by proactively removing cap insulator layers from high density regions before the outgassing problem manifests. By identifying high density regions (with excessive trench concentration) and selectively removing their cap insulator layers in advance, the patent prevents the dielectric constant variation that would otherwise result from excessive outgassing. This allows high trench density configurations to maintain dielectric uniformity.

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces dielectric constant variations across the semiconductor device, enhancing manufacturing reliability by achieving more uniform impurity distribution and outgassing, thereby improving device design and construction.

Implementation Method 1

When such impurities remain in the clean room, they may unfortunately be absorbed by the semiconductor wafers and devices during the manufacturing process... The absorption of such particles into the ILD 100 may have the undesired effect of lowering the dielectric constant

Methodology Applied
Scientific EffectAdsorption: Adsorption

Implementation Method 2

This removal may be performed after the interconnect material is deposited. This removal may be performed using chemical mechanical polishing, and by adjusting polishing rates over different regions of the inter layer dielectric

Methodology Applied
Scientific EffectChemical mechanical polishing:

Data Source

PatentUS7524758B2Interconnect structure and method for semiconductor device
Publication Date: 2009.04.28 KK TOSHIBA
  • US7524758B2 patent drawing
  • US7524758B2 patent drawing
  • US7524758B2 patent drawing

AI summary

An interconnect method in a semiconductor device may include a step of examining various regions of an inter layer dielectric to identify regions having high densities or concentrations of trench features. A cap insulator layer may be added to the dielectric to assist in outgassing of absorbed impurities from the dielectric, but may be removed from the high density areas to allow the lower density areas to increase outgassing. The lower density areas may then compensate for increased outgassing on the high density areas due to the trench features, and may result in an overall device with a more stable dielectric constant across the device.