Cap Layer Protects Conducting Pads in Chip Packages

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing chip packaging process faces reliability and structural stability issues due to the probing process, which damages conducting pads and can lead to defects and bubble formation during subsequent bonding, affecting the quality of the chip packages.

Innovation Solution

A chip package structure that includes a substrate with a conducting pad structure, a dielectric layer with an opening exposing the pad, and a cap layer that fills the opening to support the pad and prevent damage, improving the structural integrity and reducing bubble formation during bonding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a probing process is performed to ensure chip quality, then measurement precision is improved, but the conducting pad structure is damaged and reliability deteriorates

Engineering Contradiction:
Improvechip quality measurementVSAvoidconducting pad integrity
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The cap layer is formed in advance before the bonding process to protect the conducting pad structure. This preliminary protective action prevents damage that would otherwise occur during subsequent probing and bonding operations, allowing quality measurement while preserving pad integrity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The cap layer acts as a cushioning structure that absorbs mechanical stress and prevents direct contact between probing/bonding tools and the conducting pad. This beforehand cushioning protects the pad from damage while still allowing necessary measurements and connections.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Ease of operation

If the dielectric layer has an opening to expose the conducting pad structure, then ease of operation is improved, but bubble formation occurs during bonding and reliability deteriorates

Engineering Contradiction:
Improvepad accessibilityVSAvoidbonding quality
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The cap layer serves as an intermediary structure that fills the opening in the dielectric layer. It allows the conducting pad to remain accessible for electrical connections while preventing direct exposure that would cause bubble formation during bonding, thus mediating between accessibility and bonding quality requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If the conducting pad structure is exposed without protection, then ease of operation is improved, but structural stability deteriorates due to damage during subsequent processes

Engineering Contradiction:
Improvepad accessibilityVSAvoidpad structural stability
Core Design Contradiction:
Ease of operationVSStability of the object's composition

Solution Approach 1:

The cap layer is formed in advance to provide protective coverage over the conducting pad structure. This preliminary action maintains pad accessibility for operations while simultaneously providing structural protection against damage during subsequent processing steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The cap layer functions as a protective thin film structure that covers the conducting pad. This film-like structure provides mechanical protection while maintaining the electrical and operational accessibility of the underlying pad structure.

Inventive Principle:
Principle #30Flexible shells and thin films

Data Source

PatentUS9293394B2Chip package and method for forming the same
Publication Date: 2016.03.22 XINTEC INC
  • US9293394B2 patent drawing
  • US9293394B2 patent drawing
  • US9293394B2 patent drawing

AI summary

An embodiment of the invention provides a chip package which includes a substrate having a first surface and a second surface; a conducting pad structure located on the first surface; a dielectric layer located on the first surface of the substrate and the conducting pad structure, wherein the dielectric layer has an opening exposing a portion of the conducting pad structure; and a cap layer located on the dielectric layer and filled into the opening.