Cap Layer Structure for High Aspect Ratio Gate Fill
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Solution Overview
Problem
The challenge in semiconductor device manufacturing lies in forming reliable devices at smaller sizes due to increased complexity and difficulty in processing and manufacturing as feature sizes decrease, particularly in depositing conformal layers into narrow openings with high aspect ratios.
Innovation Solution
The method involves forming a semiconductor device structure with a metal gate structure, using a sequence of layers including a protection layer, a stop layer, and cap layers to protect the underlying layers during etching processes, and employing atomic layer deposition (ALD) to fill high aspect ratio openings, with additional cap layers to seal seams and gaps, providing multiple barriers for protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes are decreased to improve device density and integration, then productivity and device capacity are improved, but manufacturing precision and reliability deteriorate due to increased processing complexity and difficulty in forming conformal layers
Solution Approach 1:
The patent divides the single conformal layer deposition process into multiple sequential deposition steps, creating stacked conformal layers (first conformal layer, second conformal layer, etc.). Each layer is deposited separately to ensure proper conformality and coverage, especially in high aspect ratio openings where a single thick layer would be difficult to form uniformly. This segmentation allows each individual layer to be formed with appropriate thickness control while achieving the required total fill height.
Solution Approach 2:
The patent performs preliminary actions by forming multiple conformal layers in sequence before performing the etch back step. Each conformal layer is deposited with specific thickness control, and intermediate planarization or processing steps are performed to prepare the surface for the next deposition. This preliminary multi-layer formation ensures that the opening is properly filled and protected before the final etch back to expose the gate electrode.
2Reliability
If multiple conformal layers are deposited to fill high aspect ratio openings, then reliability and protection are improved, but device complexity and processing steps increase
Solution Approach 1:
The patent merges multiple conformal layer depositions into a unified multi-step process that achieves better reliability than a single thick layer. The first conformal layer, second conformal layer, and subsequent layers are deposited using the same or similar ALD process conditions, allowing the process to be scaled and repeated. This merging of multiple thin layers achieves the reliability of complete filling while maintaining process consistency and control.
Solution Approach 2:
The patent employs periodic action by repeating the conformal layer deposition cycle multiple times, with each cycle consisting of deposition, potential planarization, and preparation for the next layer. This periodic repetition of the deposition process allows for systematic control of layer thickness and quality, ensuring each layer is properly formed before proceeding to the next, thereby achieving reliable opening fill through iterative processing.
3Object-affected harmful factors
If cap layers are added to seal seams and gaps, then protection against contamination and etching damage is improved, but manufacturing complexity increases
Solution Approach 1:
The patent applies beforehand cushioning by forming cap layers (first cap layer, second cap layer) over the stacked conformal layers before subsequent processing steps. These cap layers serve as protective barriers that prevent contamination from entering seams and gaps in the conformal layer structure, and protect against etching damage during the etch back process. The cap layers are formed in advance to cushion the underlying sensitive structures from harmful factors during manufacturing.
Solution Approach 2:
The cap layers function as intermediary protective structures between the conformal layer filling and the etch back process. The first cap layer and second cap layer act as mediator layers that isolate the underlying gate electrode and conformal layers from direct exposure to contaminants and etching chemicals. These intermediary cap layers can be selectively removed after serving their protective function, allowing the process to proceed to the next stage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and performance of semiconductor devices by effectively filling high aspect ratio openings, reducing the risk of cracking and contamination, and providing multiple layers of protection against etching damage, thus improving the manufacturing process for smaller feature sizes.
Implementation Method 1
employing atomic layer deposition (ALD) to fill high aspect ratio openings
Data Source
AI summary
A semiconductor device structure and method for forming the same are provided. The semiconductor device structure includes a gate stack structure formed over a substrate, and the gate stack structure includes a bottom portion and a top portion. The bottom portion includes a gate electrode layer formed over a substrate. The top portion includes a protection layer formed over the gate electrode layer, a stop layer formed over the protection layer, and the stop layer is surrounded by the protection layer. A cap layer is formed over the stop layer, and the cap layer is surrounded by the stop layer.