Cap Wafer Partial Dicing Groove Alignment for Bond Pad Exposure
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Solution Overview
Problem
The partial dicing process in wafer-level packaging requires high-precision alignment and depth control to avoid damaging sensitive components and ensuring proper exposure of bond pads, while misalignment or improper depth can lead to compromised bonding and dust deposition on the pads.
Innovation Solution
Forming dicing grooves on the cap wafer and aligning it with the device substrate to allow partial cutting through these grooves, which eases alignment and height control, preventing dust from falling on bond pads and maintaining structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If high-precision alignment and depth control are used during partial dicing, then the bond pad exposure precision is improved, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
Dicing grooves are formed on the cap wafer surface before the partial dicing operation. These pre-formed grooves serve as alignment references and depth stop markers, eliminating the need for high-precision real-time alignment and depth control during the actual dicing process. The grooves are created using standard photolithography and etching processes, making the preliminary action both feasible and effective.
Solution Approach 2:
The dicing grooves act as an intermediary structure that mediates between the dicing blade and the bond pad area. The grooves provide a physical reference that guides the blade depth and position, transforming the complex control problem into a simpler geometric alignment task based on pre-formed features.
2Manufacturing precision
If the dicing blade depth is increased to fully expose the bond pad, then the bond pad exposure is improved, but the risk of damaging the substrate and bond pad increases
Solution Approach 1:
Dicing grooves are formed on the cap wafer surface before the partial dicing operation. These pre-formed grooves serve as alignment references and depth stop markers, eliminating the need for high-precision real-time alignment and depth control during the actual dicing process. The grooves are created using standard photolithography and etching processes, making the preliminary action both feasible and effective.
Solution Approach 2:
The dicing grooves serve as a protective cushion by providing a predefined depth reference. The blade is designed to stop at the groove depth, preventing it from cutting too deep and damaging the substrate or bond pad. This beforehand cushioning ensures that even with variations in blade height or alignment, the maximum depth is limited to the groove level, protecting sensitive structures.
3Object-affected harmful factors
If the dicing blade height is set higher to avoid substrate damage, then the substrate damage risk is reduced, but the bond pad may not be fully exposed
Solution Approach 1:
Dicing grooves are formed on the cap wafer surface before the partial dicing operation. These pre-formed grooves serve as alignment references and depth stop markers, eliminating the need for high-precision real-time alignment and depth control during the actual dicing process. The grooves are created using standard photolithography and etching processes, making the preliminary action both feasible and effective.
Data Source
AI summary
An encapsulation chip manufacturing method includes forming first and second dicing grooves in a surface of a cap wafer and aligning the cap wafer and a device substrate such that the surface of the cap wafer faces a surface of the device substrate. The device substrate includes a device affixed to the surface and a bond pad on the surface and coupled to the device. The cap wafer is bonded to the device substrate and partially diced at the first and second dicing grooves such that the bond pad is exposed. Aligning the cap wafer and the device substrate includes aligning the first and second dicing grooves between the bond pad and a bonding area at which the cap wafer is bonded to the device substrate. A width of the first and second dicing grooves prevents cap wafer dust formed during the partial dicing from falling on the bond pad.


