Capacitance Measurement Circuit With Parasitic Charge Cancellation
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Solution Overview
Problem
Capacitance measurement applications are hindered by parasitic capacitances associated with sense plates, switches, and wiring, leading to performance degradation, particularly in charge transfer methods, which also suffer from non-linearity issues and require practical and economic implementation on standard CMOS integrated circuits.
Innovation Solution
The technique involves compensating for parasitic capacitances by transferring unwanted charge from a measured capacitor to a reference capacitor using a compensation capacitor or current mirror structure, allowing for precise removal of parasitic capacitance effects without physical changes to the sensor structure, enabling scaling and linear operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If charge transfer method is used for capacitance measurement, then measurement capability is achieved, but parasitic capacitances degrade performance
Solution Approach 1:
The patent extracts and separates the parasitic capacitance effect from the total measured capacitance by performing a measurement without the sensor plate (or with sensor plate disconnected) to characterize CP, then subtracting this parasitic component from the total measurement to obtain the true sensor capacitance
Solution Approach 2:
The patent changes the configuration parameter of the measurement system by disconnecting or removing the sensor plate during a calibration phase to isolate and measure only the parasitic capacitance, then uses this parameter to compensate subsequent measurements
2Measurement precision
If sensitivity is increased by reducing effective CM value, then measurement sensitivity improves, but parasitic capacitance effects become more significant
Solution Approach 1:
The patent implements a feedback mechanism where the measured parasitic capacitance value is used to compensate subsequent measurements, allowing the system to maintain high sensitivity while correcting for parasitic effects through software or circuit compensation
3Measurement precision
If charge transfer cycles are performed to measure capacitance, then measurement is achieved, but non-linearity in charging capacitor degrades accuracy
Solution Approach 1:
The patent performs a greater number of charge transfer cycles than the minimum required, allowing the system to average out non-linear effects and achieve better precision through statistical convergence
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances sensitivity and practicality by isolating the measured capacitance from parasitic effects, allowing for effective integration into standard CMOS integrated circuits, reducing noise, and improving the scalability and linearity of capacitance measurement systems.
Implementation Method 1
Inherent parasitic capacitances associated with sense plates, switches, connections and wiring degrade performance in these applications
Implementation Method 2
parasitic capacitance cancellation is handled by means of a current mirror structure
Data Source
AI summary
An integrated circuit for compensating for parasitic capacitance in a capacitive measuring apparatus wherein a capacitance measurement is done by repeatedly transferring charge from a capacitor to be measured to a reference capacitor.