Differential Capacitance Measurement Circuit With Parasitic Cancellation
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Solution Overview
Problem
Conventional capacitance-to-digital converters face issues with input offset voltage and design flexibility due to parasitic capacitance and voltage supply variations, limiting their effectiveness in capacitance measurement.
Innovation Solution
A capacitance measurement circuit with a charge-to-voltage converter (CVC) that includes a differential amplifier, switch circuit, and variable capacitor, along with a parasitic capacitance cancellation circuit, which generates an output voltage insensitive to supply voltage and allows for increased design flexibility by eliminating parasitic capacitance and input offset voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional CVC is used with a single-terminal input and single-terminal output configuration, then the device complexity is reduced, but the design flexibility is limited
Solution Approach 1:
The CVC is segmented into separate input and output terminals, transitioning from a single-terminal configuration to a multi-terminal configuration. This segmentation allows independent connection and configuration of input and output circuits, thereby increasing design flexibility without significantly increasing overall device complexity.
2Device complexity
If a conventional amplifier is used in the CVC, then the device complexity is reduced, but the input offset voltage problem occurs
Solution Approach 1:
The input offset voltage issue is extracted and addressed separately through the introduction of a parasitic capacitance cancellation circuit. This dedicated circuit component is added to specifically eliminate parasitic capacitance effects, improving measurement precision without requiring a complete redesign of the amplifier structure.
Solution Approach 2:
A parasitic capacitance cancellation circuit is introduced as an intermediary component between the amplifier and the capacitance sensor. This intermediary circuit specifically targets and eliminates parasitic capacitance effects, allowing the conventional amplifier to continue functioning while improving overall measurement accuracy.
3Reliability
If the CVC is made insensitive to supply voltage variations, then the reliability of the digital pulse stream is improved, but the device complexity increases due to additional circuits
Solution Approach 1:
The CVC circuit is designed to maintain equipotential conditions at critical nodes, ensuring that voltage variations at the supply do not propagate to the output. By maintaining stable voltage potentials through proper circuit configuration and reference voltage connections, the output becomes insensitive to supply voltage fluctuations, improving reliability without requiring complex regulation circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively eliminates parasitic capacitance and input offset voltage, providing a stable output voltage that is not dependent on supply voltage, thereby enhancing the accuracy and flexibility of capacitance measurement.
Implementation Method 1
a charge to voltage converter (CVC) that includes a differential amplifier, switch circuit, and variable capacitor
Implementation Method 2
parasitic capacitance cancellation circuit, which generates an output voltage insensitive to supply voltage and allows for increased design flexibility by eliminating parasitic capacitance and input offset voltage
Data Source
AI summary
A capacitance measure circuit includes a charge to voltage converter (CVC), and the CVC includes an excitation signal generation circuit that is arranged to generate and connect an excitation signal to a first terminal of a capacitance sensor, a differential amplifier, a first switch circuit, and at least one first variable capacitor. The inverting input terminal of the differential amplifier is arranged to receive a sensing capacitance value from a second terminal of the capacitance sensor. The first switch circuit is coupled between the inverting input terminal and the non-inverting output terminal of the differential amplifier, and is connected in parallel with the at least one first variable capacitor at the inverting input terminal and the non-inverting output terminal of the differential amplifier.