Capacitance Detection Circuit Using Differential and Summing Front-Ends

The detection circuit is segmented into multiple front-end circuits, each handling specific capacitance measurement tasks. Each front-end circuit processes capacitance signals from different capacitors independently, converting them to voltage signals and performing differencing operations. This segmentation allows the system to maintain high sensitivity for individual capacitance measurements while managing overall system complexity through modular design.

The patent transforms capacitance signals into voltage signals through front-end circuits, changing the measurement parameter from capacitance to voltage. This parameter transformation enables the use of voltage-based processing techniques (differencing and summing) to improve detection sensitivity. The processing circuit then reconstructs capacitance values from the processed voltage signals, achieving high-precision capacitance detection through parameter conversion.

The patent extracts the sensitivity improvement function from the physical cancel capacitor and implements it through circuit-based differencing operations in the front-end circuits. Instead of using a large external cancel capacitor to compensate for self-capacitance effects, the system uses multiple smaller capacitors with their capacitance signals processed through differencing circuits. This extraction replaces a volume-consuming component with a circuit-based solution that achieves the same sensitivity improvement without the physical bulk.

The patent uses multiple capacitors to be detected (at least N-1 capacitors) as substitutes for a single large cancel capacitor. Each capacitor's signal is copied and processed through front-end circuits that perform differencing and summing operations. This copying approach allows the system to achieve cancel capacitor-like sensitivity improvement using multiple smaller, integrable capacitor units rather than one large non-integrable component.

The patent merges the functions of multiple capacitors and their associated front-end circuits into an integrated detection system. Instead of using a single expensive cancel capacitor, the system combines multiple capacitors with shared processing resources (front-end circuits that perform both differencing and summing operations). This merging approach distributes the cost across multiple smaller, cheaper components while achieving the same sensitivity improvement, making the solution more cost-effective and manufacturable.

The front-end circuits are designed with multi-functionality, serving both as capacitance-to-voltage converters and as differencing/summing processors. Each front-end circuit handles multiple capacitors and performs multiple operations (conversion and signal processing), reducing the total component count and manufacturing complexity. This universal design approach lowers production costs compared to specialized single-function components that would be required in alternative solutions.

The patent inverts the traditional approach by not directly measuring the large self-capacitance value, but rather measuring the differences and sums of multiple capacitance signals. Instead of attempting to detect small changes in a large capacitance value (which reduces sensitivity), the system measures the relationships between multiple capacitance values through differencing and summing operations. This inversion of the measurement strategy maintains sensitivity even when individual capacitance values are large.

The front-end circuits serve as intermediaries that transform capacitance signals into voltage signals and perform differencing/summing operations before the final capacitance value is determined. These intermediary processing stages allow the system to handle large capacitance values by breaking down the measurement into manageable differential and summation operations, preserving detection sensitivity throughout the measurement chain despite high self-capacitance values.