Capacitance Detection Apparatus Dual-Phase Charge Accumulation

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Solution Overview

Problem

Existing capacitance detection systems face challenges in increasing detection speed and accuracy, particularly in large touchpad surfaces with multiple detection positions, where external noise interference and reduced noise immunity affect the ability to quickly capture finger movements and minute capacitance changes.

Innovation Solution

A capacitance detection apparatus with a charge accumulating circuit that compares voltages at specific timings after charge transfers, using a feedback circuit to adjust charges and reduce the time required to reach threshold voltages, thereby enhancing detection speed and accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If continuous charge integration is performed by switching capacitor connection direction during rising and falling periods of drive signal, then external noise is averaged and attenuated, but the time required to obtain detection signals of predetermined bit length increases

Engineering Contradiction:
Improvenoise immunityVSAvoiddetection time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs charge accumulation during both the rising period (first accumulation period) and falling period (second accumulation period) of the drive signal in advance. By accumulating charges Q1 and Q2 separately during these periods and then comparing their sum against a threshold, the system prepares the necessary charge integration before the detection decision is made, thereby reducing the overall detection time while maintaining noise immunity through the averaging effect of dual-period accumulation.

Inventive Principle:
Principle #10Preliminary action

2Area of stationary object

If the number of detection positions on the input surface is increased, then the sensing coverage is improved, but the sensing time at each detection position must be decreased to maintain sensing speed

Engineering Contradiction:
Improveinput surface areaVSAvoiddetection speed
Core Design Contradiction:
Area of stationary objectVSSpeed

Solution Approach 1:

The patent divides the charge accumulation process into two separate segments: first accumulation period during the rising phase and second accumulation period during the falling phase. Each segment accumulates charge independently, and the results are combined for comparison. This segmentation allows parallel processing of charge accumulation across multiple detection positions, enabling faster overall detection speed while maintaining adequate sensing time at each position through the distributed accumulation approach.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution doubles the capacitance detection speed compared to existing systems, allowing for faster signal acquisition and improved noise immunity, especially in scenarios with increased detection signals and varying touch conditions.

Implementation Method 1

a first capacitor having a first electrode and a second electrode, accumulates the transferred negative charge in the first electrode of the first capacitor, and accumulates the transferred positive charge in the second electrode of the first capacitor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS10088510B2Capacitance detection apparatus and input apparatus
Publication Date: 2018.10.02 ALPS ALPINE CO LTD
  • US10088510B2 patent drawing
  • US10088510B2 patent drawing
  • US10088510B2 patent drawing

AI summary

A voltage of a first capacitor is compared with a threshold voltage and a signal corresponding to the comparison result is generated at each of a first timing during a period after the transfer of a positive charge has ended and before the transfer of a negative charge starts and a second timing during a period after the transfer of the negative charge has ended and before the transfer of the positive charge starts. In each of the case where a positive charge is transferred and the case where a negative charge is transferred, operations (digitization of an integrated value and a feedback operation) of a delta sigma modulator are performed.