Capacitance Detection Using Maximum Length Sequences
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Solution Overview
Problem
Existing capacitive touch panel detection circuits are inefficient for large touch panel control areas due to slow detection speed and high power consumption, especially when measuring multiple capacitance values simultaneously, leading to increased hardware costs and peak-to-average power ratio (PAPR).
Innovation Solution
A detection apparatus and method utilizing a maximum length sequence to generate input signals for capacitors, allowing simultaneous detection of multiple capacitance values with a lower PAPR and improved signal-to-noise ratio (SNR), comprising a voltage generator, summation module, multipliers, integrators, and an estimation module to estimate capacitance values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a detection circuit measures capacitance values sequentially one electrode at a time, then the detection speed is slow, but the hardware complexity is low
Solution Approach 1:
The patent combines multiple capacitance measurement operations into a single integrated circuit that can simultaneously measure multiple electrodes. The detection circuit integrates multiple switching paths, capacitors, and signal processing units into one unified structure, enabling parallel measurement of multiple electrodes without requiring separate sequential circuits for each electrode.
Solution Approach 2:
The patent employs dynamic switching mechanisms using multiplexers and switches that can rapidly reconfigure the circuit connections between electrodes and detection components. This dynamic reconfiguration allows the same hardware resources to be dynamically allocated to different electrodes in a time-multiplexed manner, achieving high-speed sequential access to multiple electrodes while using a single detection circuit.
2Speed
If multiple capacitance values are measured simultaneously using prior art methods, then the detection speed improves, but the peak-to-average power ratio (PAPR) increases and power consumption rises
Solution Approach 1:
The patent implements periodic switching and measurement cycles where electrodes are measured in organized sequences rather than all simultaneously. The detection process uses periodic activation of switching elements and capacitive charging/discharging cycles, which distributes power consumption over time and prevents peak power surges that would occur with truly simultaneous measurement of all electrodes.
Solution Approach 2:
The patent uses dynamic switching control to activate only the necessary circuit paths and components during each measurement cycle. By dynamically enabling or disabling specific switching elements, capacitors, and signal processing paths based on current measurement requirements, the circuit minimizes active power-consuming elements at any given moment while maintaining the capability to measure all electrodes.
3Speed
If multiple capacitance values are measured simultaneously using prior art methods, then the detection speed improves, but the hardware costs increase
Solution Approach 1:
The patent designs a universal detection circuit structure where a single set of operational amplifiers, ADCs, and signal processing units can serve multiple electrodes through time-multiplexed operation. The same hardware resources are universally applied to measure different electrodes at different time slots, eliminating the need for dedicated measurement circuits for each electrode and thereby reducing overall hardware complexity and cost.
Solution Approach 2:
The patent merges multiple measurement functions into a single integrated detection unit that handles multiple electrodes. By combining switching matrices, shared capacitive elements, and common signal processing pathways, the circuit achieves multi-electrode measurement capability without proportionally increasing the number of discrete components, thus reducing hardware costs while maintaining simultaneous measurement speed.
4Measurement precision
If the operational amplifier has a larger linear operation interval to handle increased PAPR, then the measurement accuracy improves, but the power consumption and hardware costs increase
Solution Approach 1:
The patent incorporates feedback mechanisms in the detection circuit that monitor the output signals and adjust the operating parameters of operational amplifiers in real-time. By using feedback control, the circuit maintains measurement accuracy within the available linear operation range of the amplifiers without requiring them to operate at the extremes of their ranges, thus avoiding the need for oversized amplifiers with larger linear intervals that would consume more power.
Solution Approach 2:
The patent dynamically adjusts operating parameters such as gain, bandwidth, and reference voltages of the operational amplifiers based on the current measurement conditions and signal characteristics. By changing these parameters adaptively, the circuit optimizes the use of the amplifier's linear operation range for each specific measurement task, maintaining high measurement precision while minimizing the required amplifier size and power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient simultaneous detection of multiple capacitance values with reduced power consumption and hardware costs, while maintaining a higher SNR compared to prior art, by employing an operational amplifier with a smaller linear operation range and ADC with a narrower input voltage range.
Implementation Method 1
a voltage generator 41, a summation module 42... The voltage generator generates an N number of input signals, and provides an ith input signal of the N number of input signals to an ith capacitor
Implementation Method 2
The summation module sums up an N number of response signals generated after providing the N number of input signals to the N number of capacitors to generate a summed signal
Implementation Method 3
An ith integrator of the N number of integrators integrates the ith multiplied signal to generate an ith integrated signal
Data Source
AI summary
A capacitance detection apparatus for a touch panel includes an N number of capacitors. The detection apparatus generates an N number of different input signals, and provides an ith input signal of the input signals to an ith capacitor. The N number of input signals correspond to a delayed sequence of a maximum length sequence or the maximum length sequence. The detection apparatus sums up an N number of response signals, which are generated after providing the N number of input signals to the N number of capacitors, to generate a summed signal. The summed signal is multiplied by the ith input signal and integrated to generate an ith integrated signal. The detection apparatus estimates capacitance values of the N number of capacitors according to the N number of integrated signals, respectively.