Capacitance Detector Parallel Switching Circuit
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Solution Overview
Problem
Conventional capacitance detectors require multiple stages to generate an output, leading to reduced detection sensitivity and speed of signal acquisition, and experience voltage fluctuation issues due to equalization processes.
Innovation Solution
A capacitance detector configuration using four capacitors and switching mechanisms to enable differential voltage output in two stages, with alternate switching and polarity inversion to improve sensitivity and noise rejection, and the incorporation of current sources to enhance capacitance difference and sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple stages are used to generate output in conventional capacitance detectors, then the circuit can perform differential detection, but the detection sensitivity is reduced and signal acquisition speed decreases
Solution Approach 1:
The detection circuit is divided into two independent detection sections instead of sequential stages. Each section independently performs charge equalization between the first capacitor (Cs) and a reference capacitor (Cr), generating detection voltages simultaneously. This segmentation eliminates the sequential dependency while maintaining differential detection capability.
Solution Approach 2:
The patent transitions from a temporal sequence (stage 1 then stage 2) to a spatial parallel arrangement (section 1 and section 2 operating simultaneously). By adding the dimension of parallel operation, the system achieves both differential detection and high-speed acquisition without the sensitivity loss inherent in sequential multi-stage designs.
2Measurement precision
If three capacitors are used for equalization in conventional detectors, then charge equalization can be performed, but the amount of voltage fluctuation is reduced
Solution Approach 1:
The patent extracts the sampling and holding capacitor from the charge equalization process, separating the equalization function (performed by Cs and Cr only) from the voltage storage function. This allows the equalization process to involve only two capacitors, maximizing voltage fluctuation amplitude while a dedicated sampling and holding capacitor preserves the detected voltage without participating in equalization.
3Reliability
If two stages are required to generate output, then differential detection can be achieved, but the number of signal acquisition times within a certain period is reduced
Solution Approach 1:
Both detection sections operate continuously and simultaneously throughout the measurement period, rather than alternating in discrete stages. The first section continuously equalizes charge between Cs and Cr to generate one differential voltage, while the second section simultaneously performs the same operation to generate a second differential voltage, maximizing the acquisition rate.
Solution Approach 2:
The patent employs periodic switching of the switches (SW1-SW4) to alternately connect the capacitors for charging, equalization, and holding in a cyclic manner. This periodic operation allows rapid repetition of the detection cycle, increasing the number of acquisitions within a given time frame while maintaining differential detection integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances detection sensitivity and accuracy by increasing signal acquisition frequency while minimizing voltage fluctuation and noise, allowing for effective noise removal and improved anti-noise properties.
Implementation Method 1
a first capacitor which is an object to be detected and has fixed base capacitance and variable capacitance; a second capacitor charged with base charge corresponding to the base capacitance; third and fourth capacitors which receive capacitance distribution from the first or second capacitor
Implementation Method 2
a first switching means for charging the first and second capacitors to a first fixed voltage and charging the third and fourth capacitors to a second fixed voltage in a first section and for charging the first and second capacitors to the second fixed voltage and charging the third and fourth capacitors to the first fixed voltage in a second section
Implementation Method 3
a differential amplifier to which first and second voltages corresponding to equalized charge, which is equalized by capacitors connected to each other by the second switching means and which is held in the third and fourth capacitors, are differentially input
Data Source
AI summary
A capacitance detector includes: a first capacitor with fixed base capacitance and variable capacitance; a second capacitor charged with base charge corresponding to the base capacitance; third and fourth capacitors which receive capacitance distribution from the first or second capacitor; a first switching means for charging the first and second capacitors to a first fixed voltage and charging the third and fourth capacitors to a second fixed voltage in a first section and for charging the first and second capacitors to the second fixed voltage and charging the third and fourth capacitors to the first fixed voltage in a second section; a second switching means for separating the first and second capacitors from the third and fourth capacitors and for connecting the first and second capacitors to the third and fourth capacitors; and a differential amplifier to which first and second voltages corresponding to equalized charge are differentially input.