Capacitance Difference Measurement Using Alternating DC Voltages
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for measuring capacitance differences, particularly for small capacitances relevant in circuit design, lack the accuracy needed due to the scaling of technology, as existing charge-based capacitance measurement methods are insufficient for precise assessments.
Innovation Solution
A method and system that utilize alternating DC voltages and non-overlapping clock signals to measure capacitance differences between capacitive elements, ensuring symmetry and canceling out parasitic influences, allowing for accurate determination through separate measurements and subtraction of currents during charging and discharging phases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If charge-based capacitance measurement method is used, then absolute capacitance can be measured, but measurement precision is insufficient for very small capacitances
Solution Approach 1:
The measurement process is divided into two distinct phases: a first phase where DC voltages are applied and switches are alternately closed to measure baseline currents, and a second phase where DC voltages are applied alternatingly to charge and discharge capacitive elements. By segmenting the measurement into separate phases and subtracting currents from each phase, the method isolates the capacitance difference signal from parasitic influences, achieving accurate measurement of very small capacitances (100 fF and below).
Solution Approach 2:
The method changes the voltage application parameters between phases: in the first phase, DC voltages are applied statically with alternating switch closure, while in the second phase, DC voltages are applied alternatingly to different nodes. This parameter change enables the system to differentiate between parasitic currents and actual capacitance difference currents, significantly improving measurement precision for small capacitances.
2Productivity
If technology scaling is applied, then circuit integration is improved, but capacitance values become too small for accurate measurement
Solution Approach 1:
The method extracts the capacitance difference signal from the total current by performing separate measurements in two phases and subtracting the results. This extraction process isolates the small capacitance difference signal from larger parasitic currents, enabling accurate measurement of the scaled-down capacitance values that result from technology scaling while maintaining high circuit integration density.
3Measurement precision
If matched switches are used for symmetry, then parasitic influence cancellation is improved, but device complexity increases
Solution Approach 1:
While using matched switches for symmetry, the method intentionally introduces asymmetry in the voltage application pattern between phases. In the first phase, voltages are applied statically with alternating switch closure; in the second phase, voltages are applied alternatingly to different nodes. This controlled asymmetry in the measurement sequence, combined with symmetric matched switches, enables parasitic cancellation while maintaining manageable device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves improved accuracy in measuring capacitance differences, enabling precise assessments of small capacitances relevant in circuit design, with embodiments demonstrating accuracy of up to 3.5% for capacitance mismatches as low as 100 aF, suitable for various applications including on-chip monitoring and position information determination.
Implementation Method 1
The first capacitive element is connected between a first node and a second node... The second capacitive element is connected between a third node and a fourth node... In a first phase of the measurement, the first DC voltage is applied to the first node and the second DC voltage is applied to the third node, to charge the capacitive elements
Implementation Method 2
the first and second switches are alternately closed by means of non-overlapping clock signals. First resulting currents flowing through at least one of the first and second switches are measured
Data Source
AI summary
Methods and systems for measuring capacitance difference are disclosed. In one aspect, first and second capacitive elements are connected between voltage receiving nodes for receiving first and second DC voltages and nodes connectable to a third DC voltage via a first, resp. second switch. Further, in a first phase, a voltage difference is applied to charge the capacitive elements and the switches are alternately closed. First resulting currents are measured. Further, in a second phase, the first and second DC voltages are applied alternatingly and the switches are alternately closed. Second resulting currents are measured. The capacitance difference can be determined from the first and second resulting currents.