Capacitance-to-Digital Modulator Fold-Back Suppression
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Solution Overview
Problem
Existing capacitance-to-digital modulators using sigma-delta architecture fail to accurately convert capacitance ratios under abnormal operating conditions such as overpressure combined with a short circuit, leading to 'fold-back anomaly' where the digital reading is incorrect in magnitude and polarity.
Innovation Solution
A second-order capacitance-to-digital modulator with first and second stage sigma-delta integrators operating in two phases, where the first stage sigma-delta integrator is not reset during the auto-zero phase, allowing the output to be sampled and integrated, and an auto-zero capacitor stores voltage related to the leakage resistance of sensor capacitors to suppress fold-back anomaly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional sigma-delta modulator is used for capacitance-to-digital conversion, then the circuit structure is simple, but the measurement accuracy deteriorates under abnormal operating conditions such as overpressure combined with short circuit
Solution Approach 1:
The modulator is divided into two stages: a first sigma-delta modulator stage and a second sigma-delta modulator stage. The first stage processes the raw capacitance signal and the second stage refines the conversion, with each stage having its own integrator and quantizer. This segmentation allows the system to maintain accuracy under abnormal conditions while keeping each individual stage relatively simple.
Solution Approach 2:
The system performs preliminary auto-zero calibration before normal measurement operation. During the auto-zero phase, the integrators are calibrated to eliminate offset errors and leakage effects. This preliminary action ensures that when abnormal conditions occur during measurement, the system has already compensated for potential accuracy issues.
2Ease of operation
If the first stage sigma-delta integrator is reset during auto-zero phase, then the circuit operation is simplified, but fold-back anomaly occurs under overpressure and short circuit conditions
Solution Approach 1:
The integrator reset operation is made dynamic and conditional rather than fixed. The first stage integrator is configured to remain unset during the auto-zero phase under normal operation, but can be selectively reset when fold-back anomaly is detected. This dynamic control allows the system to adapt its operation based on conditions, maintaining reliability while preserving ease of operation when needed.
Solution Approach 2:
The system incorporates feedback mechanisms to detect fold-back anomaly conditions and adjust the integrator reset timing accordingly. When the output signal indicates fold-back (abnormal polarity or magnitude), the feedback control modifies the reset sequence to prevent the anomaly, ensuring reliable measurement while maintaining simple operational control through automated detection and correction.
3Reliability
If additional circuitry is added to suppress fold-back anomaly, then measurement reliability improves, but device complexity increases
Solution Approach 1:
The existing integrators and switches in the two-stage modulator are made multi-functional. The same integrator circuits perform both normal integration and fold-back prevention functions. The switches serve dual purposes of signal routing and integrator control. This universality allows the system to achieve improved reliability through intelligent control of existing components rather than adding dedicated fold-back prevention circuitry.
Solution Approach 2:
The modulator system performs self-diagnosis and self-correction for fold-back anomaly. The dual-stage architecture with auto-zero capability allows the system to automatically detect when fold-back conditions occur and self-correct by adjusting the integration and reset sequences. This self-service approach improves reliability without requiring external monitoring or additional correction circuitry.
Data Source
AI summary
A two phase, second order capacitance-to-digital (CD) modulator includes a first stage sigma-delta integrator that forms charge packets as a function of sensor capacitance during an auto-zero phase and integrates the packets during an integration phase to produce an output voltage. The first stage integrator holds its output voltage during the auto-zero phase, so that a second stage sigma-delta integrator can sample the first stage output voltage during the auto-zero phase and integrate the sampled voltage during the integration phase.