Capacitance Measurement Using Floating Probe Calibration
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Solution Overview
Problem
Current Wafer Acceptance Test (WAT) capacitance measurement methods are inefficient and inaccurate due to the need for continuous probe up and down, which affects test speed and cleanliness, leading to parasitic capacitance interference.
Innovation Solution
A capacitance measurement method that uses a calibration file to store first capacitance values of a measurement probe card when floating, allowing for simultaneous measurement of multiple semiconductor devices without repeated probe-down, reducing measurement time and improving accuracy by directly reading these values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If continuous probe up and down is performed for capacitance measurement, then measurement can be conducted, but test time increases and measurement accuracy decreases due to parasitic capacitance interference
Solution Approach 1:
The patent performs probe down action in advance and maintains continuous contact with the semiconductor device during capacitance measurement, eliminating the need for repeated probe up and down operations. This preliminary positioning of the probe card resolves the contradiction by preventing time loss from repeated probing while maintaining measurement accuracy through stable contact.
2Measurement precision
If frequent probe-down operations are performed, then capacitance values can be measured, but probe card cleanliness deteriorates and parasitic capacitance interference increases
Solution Approach 1:
The patent maintains continuous probe-down contact throughout the capacitance measurement process, eliminating repeated probe up and down operations. This continuous contact state prevents the generation of parasitic capacitance that would occur during probe card repositioning, while also maintaining probe card cleanliness by minimizing contact cycles with metal pads.
3Productivity
If Wafer Acceptance Test (WAT) capacitance measurement method is used, then measurement can be performed, but measurement efficiency is low and accuracy is poor
Solution Approach 1:
The patent performs probe down action in advance before capacitance measurement and maintains continuous contact during measurement. This preliminary positioning eliminates the need for repeated probe up and down operations, simultaneously improving measurement efficiency by reducing operational cycles and enhancing accuracy by maintaining stable probe-card-to-device contact throughout measurement.
Data Source
AI summary
Embodiments of the disclosure provide a capacitance measurement method, system and apparatus, an electronic device, and a storage medium. The method is applied to a machine table and includes: obtaining a calibration file including multiple first capacitance values corresponding to a measurement probe card while the measurement probe card is floating; measuring, by the measurement probe card, multiple semiconductor devices simultaneously to obtain multiple second capacitance values corresponding to the multiple semiconductor devices, the multiple semiconductor devices being located on a same test module of a semiconductor chip; and determining target capacitance values of the multiple semiconductor devices based on the multiple first capacitance values and the multiple second capacitance values.


