Capacitance Measurement Using Calibration Pads to Remove Parasitics
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Solution Overview
Problem
Existing capacitance measurement methods for capacitive devices in semiconductor devices are inaccurate due to parasitic capacitors between test pads, leading to deviations from the actual capacitance values without increasing testing costs.
Innovation Solution
A capacitance measurement method involving calibration test pads and test pads on a wafer, with parallel and equally spaced configurations, uses a switch device to measure first and second capacitances, allowing subtraction to eliminate parasitic capacitance and calculate accurate capacitance values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If test pads are used to measure capacitance of capacitive device, then testing cost is not increased, but measurement precision deteriorates due to parasitic capacitors between test pads
Solution Approach 1:
The test system is segmented into two distinct paths: a first test path connecting two test pads and a second test path connecting two calibration pads. This segmentation allows separate measurement of parasitic capacitance (via calibration pads) and total capacitance (via test pads), enabling accurate extraction of the capacitive device's true capacitance by subtracting the parasitic component.
Solution Approach 2:
Calibration pads serve as an intermediary element to measure and quantify the parasitic capacitance introduced by the test pad structure. By introducing these dedicated calibration pads that replicate the test pad geometry and spacing, the parasitic effect is isolated and measured separately, allowing for accurate compensation in the final capacitance calculation.
2Measurement precision
If calibration test pads are added to eliminate parasitic capacitance, then measurement precision improves, but device complexity increases
Solution Approach 1:
The calibration pads are designed with the same geometric parameters (width, length, spacing) as the test pads, making them structurally universal. This allows the calibration structure to replicate the exact parasitic capacitance conditions of the test pads while serving the additional function of providing a reference measurement for parasitic capacitance extraction.
Solution Approach 2:
The invention changes the configuration parameter by introducing calibration pads with specific geometric parameters matched to the test pads. By controlling and matching parameters such as pad width, length, and spacing, the parasitic capacitance can be accurately replicated and measured, enabling precise compensation without arbitrary structural modifications.
3Manufacturing precision
If parallel connection lines with equal spacing are used for calibration and test pads, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
While the calibration and test pad pairs are symmetrically configured, the overall layout introduces controlled asymmetry by placing the calibration pad pair adjacent to the test pad pair with specific spacing relationships. This asymmetric positioning allows clear differentiation between calibration and test functions while maintaining manufacturability through standardized spacing rules.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Accurate capacitance measurement of capacitive devices is achieved without increasing testing costs by incorporating calibration test pads and a switch device, ensuring precise capacitance calculation.
Implementation Method 1
measuring a voltage value between the two calibration test pads and a current value flowing between the two calibration test pads based on the test signal, and calculating the first capacitance based on a time variation rate of the voltage value and the current value
Data Source
AI summary
A capacitance measurement method for a capacitive device is provided. The method includes: providing a wafter, on which the capacitive device is formed, having a set of calibration test pads and a set of test pads; applying a test signal to the set of calibration test pads through a first test path to measure a first capacitance between two calibration test pads; applying the test signal to the set of test pads through a second test path to measure a second capacitance between two test pads; and obtaining a capacitance of the capacitive device by a difference between the first capacitance and the second capacitance.