Capacitance Multiplier Circuit Reduces Die Area
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Solution Overview
Problem
Existing circuit applications face challenges in implementing large-value capacitors due to their large die area requirements, which is impractical for many implementations, especially in narrow bandwidth loop compensation circuits and PWM boost converters.
Innovation Solution
A capacitance multiplier circuit that uses an amplifier to control a switch and resistor circuits to generate an equivalent capacitance that is a multiple of the physical capacitance, allowing for a compact implementation without the need for large die area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large-value compensation capacitor is used to ensure proper operation in narrow bandwidth loop compensation circuits and PWM boost converters, then the circuit stability and compensation performance are improved, but the die area occupied increases significantly
Solution Approach 1:
The patent transforms the physical capacitor into an active circuit implementation using operational amplifiers, resistors, and switches that simulate capacitance behavior. By changing the implementation parameter from physical capacitor to active circuit equivalent, the die area is dramatically reduced while maintaining the required capacitance value for stability compensation.
Solution Approach 2:
The patent replaces the passive mechanical/electrical capacitor component with an active electronic system using operational amplifiers and switching circuits. This substitution allows the capacitance function to be achieved through active circuit elements rather than a large physical capacitor, resolving the area-stability contradiction.
2Stability of the object's composition
If the control loop bandwidth is limited due to the presence of a right hand plane (RHP) zero in PWM boost regulators, then the stability is improved, but the compensation capability for phase shift is reduced
Solution Approach 1:
The patent introduces an intermediary active circuit implementation of the compensation capacitor that can dynamically adjust its characteristics. This intermediary circuit uses operational amplifiers and switching elements to provide the necessary phase shift compensation while working within the bandwidth limitations imposed by the RHP zero, enabling both stability and compensation capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The capacitance multiplier circuit effectively provides a high equivalent capacitance with a significantly reduced die area footprint, suitable for applications like low-frequency PLLs and boost regulators, while compensating for phase shifts and maintaining stability.
Implementation Method 1
capacitance multiplier circuitry that operates with the capacitor circuit to provide an equivalent capacitance that is a multiple of the first capacitance
Data Source
AI summary
Capacitance multiplier circuitry provides an increased equivalent capacitance, and may be implemented using a desirably small footprint. As may be implemented in accordance with one or more embodiments, a capacitor provides a first capacitance across first and second plates, and capacitance multiplier circuitry operates with the capacitor to provide a second equivalent capacitance that is a multiple of the first capacitance. The capacitance multiplier circuitry includes a first circuit path having a first resistor between the first plate and a common terminal, and a second circuit path having a switch and a second resistor between the second plate and the common terminal. An amplifier has differential inputs respectively corresponding to the first and second circuit paths and provides the second equivalent capacitance by controlling operation of the switch based upon the differential inputs and the respective resistances provided by the resistors in the first and second circuit paths.