Capacitance Element Recess Structure for Liquid Crystal Aperture Ratio
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Solution Overview
Problem
Existing liquid crystal display devices face challenges in improving the aperture ratio of pixels, which affects image brightness, due to design margins required for processing accuracy and light shielding properties of capacitance elements.
Innovation Solution
The design includes a capacitance element with a first and second recess, where the second recess is deeper and continuous with the first, allowing for a capacitance electrode and insulating layer configuration that reduces the need for patterning and improves light blocking without narrowing the pixel opening, thereby enhancing the aperture ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If film formation and patterning are repeated for each electrode constituting a storage capacitor, then the capacitance element can be formed with proper alignment, but the aperture ratio of the pixel deteriorates due to design margins required for alignment accuracy and processing accuracy
Solution Approach 1:
The patent merges the formation of multiple electrodes (first capacitance electrode, second capacitance electrode, and common electrode) into a single patterning process. By forming all electrodes simultaneously in one patterning step rather than repeating patterning for each electrode separately, the design margin required for alignment accuracy is eliminated, thereby improving the aperture ratio while maintaining proper electrode alignment and preventing short circuits.
Solution Approach 2:
The patent transitions from a two-dimensional planar patterning approach to a three-dimensional recess-based structure. By forming electrodes within recesses of different depths in the insulating layer, the patent enables precise electrode positioning and isolation without requiring additional patterning design margins, thus improving aperture ratio while maintaining manufacturing precision.
2Reliability
If a design margin is provided in the planar shape of each pattern to prevent short circuit between electrodes, then manufacturing reliability is improved, but the aperture ratio deteriorates
Solution Approach 1:
The patent implements a nested structure where electrodes are formed within recesses of different depths in the insulating layer. The first capacitance electrode is formed in a first recess, the second capacitance electrode in a second recess, and the common electrode in a third recess. This nested arrangement within vertical recesses provides natural isolation between electrodes, ensuring manufacturing reliability by preventing short circuits without requiring lateral design margins that would reduce aperture ratio.
3Object-affected harmful factors
If the capacitance element is arranged in a light shielded region, then the light shielding property is maintained, but the aperture ratio cannot be improved
Solution Approach 1:
The patent moves the capacitance element from a two-dimensional planar arrangement in light-shielded regions to a three-dimensional structure using recesses of different depths. By forming the first capacitance electrode in a first recess and the second capacitance electrode in a deeper second recess, the patent maintains light shielding properties through the vertical structure while reducing the lateral footprint, thereby improving aperture ratio.
Data Source
AI summary
A liquid crystal device as an electro-optical device includes, an insulating layer including a first recess and a second recess that is provided continuously with the first recess and is deeper than the first recess, and a capacitance element including, a first capacitance electrode provided along a bottom surface of the second recess and a side wall of the second recess and provided along a bottom surface of the first recess, a capacitance insulating layer stacked on the first capacitance electrode, and a second capacitance electrode stacked on the capacitance insulating layer, wherein an upper surface of the second capacitance electrode at a position overlapping with the second recess, an upper surface of the first capacitance electrode at a position overlapping with the first recess, and a part of the capacitance insulating layer, are provided on the same surface as an upper surface of the insulating layer.