Capacitance Sensing Circuit Using Sample-Hold for Noise Reduction

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Solution Overview

Problem

Conventional capacitance sensing circuits suffer from poor Signal-to-Noise Ratio (SNR) due to time-variable noise in the input signal, which deteriorates the accuracy of capacitance sensing, especially when the capacitance of the sensing electrode is large.

Innovation Solution

A capacitance sensing circuit that includes a sample-hold circuit to generate a stable input reference signal, reducing noise by fixing its level over a period, and a signal generating circuit to produce an input signal with minimal time-variable noise, thereby improving the SNR.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the input signal is taken directly from the internal circuit (power supply circuit), then the circuit complexity is reduced, but the noise in the input signal increases and the SNR deteriorates

Engineering Contradiction:
Improvecircuit complexityVSAvoidcapacitance sensing accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

A sample-hold circuit is introduced as an intermediary component between the power supply circuit and the capacitance sensing circuit. This mediator samples the reference signal at specific moments and holds it steady during the sensing period, isolating the sensing process from the time-variable noise of the power supply while maintaining circuit simplicity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The sample-hold circuit performs preliminary action by sampling the reference signal in advance and maintaining it at a fixed level before the actual capacitance sensing occurs. This preliminary stabilization of the input signal prevents noise from affecting the sensing measurement.

Inventive Principle:
Principle #10Preliminary action

2Ease of operation

If the input signal level varies over time, then the circuit operation is simplified, but the noise increases and SNR decreases

Engineering Contradiction:
Improvecircuit operation simplicityVSAvoidcapacitance sensing accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The sample-hold circuit operates periodically by sampling the reference signal at specific intervals and holding it during the sensing period. This periodic sampling and holding action creates a stable input signal level during measurement while maintaining simple circuit operation throughout the cycle.

Inventive Principle:
Principle #19Periodic action

3Device complexity

If no sample-hold circuit is used, then the device complexity is reduced, but the noise of the input signal increases

Engineering Contradiction:
Improvedevice complexityVSAvoidnoise level
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The sample-hold circuit serves as an intermediary that filters out time-variable noise from the reference signal before it reaches the capacitance sensing circuit, thereby reducing noise levels while adding minimal complexity to the overall device.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11703983B2Capacitance sensing circuit
Publication Date: 2023.07.18 SENSORTEK TECH
  • US11703983B2 patent drawing
  • US11703983B2 patent drawing
  • US11703983B2 patent drawing

AI summary

The application relates to a capacitance sensing circuit, which samples and holds a reference signal to generate an input reference signal, hereby, an input signal is generated to a sensing circuit. Thereby, the sensing circuit generates an output signal according to the input signal and a sensing signal, for the capacitance sensing.