Capacitive ADC Weighting for CMOS Image Sensor Dynamic Range
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Solution Overview
Problem
Existing CMOS-type solid-state image pickup apparatuses face errors in dynamic range expansion due to noise and response lag during pixel signal amplification and A/D conversion, leading to inaccuracies in weighting addition of pixel signals.
Innovation Solution
An A/D conversion circuit with capacitive elements that hold and synthesize pixel signals, generating a node potential for digital value generation, and a signal synthesis unit that temporarily holds and amplifies pixel signals to perform weighting addition without errors caused by amplification or conversion processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If pixel signals are amplified and converted to digital values through conventional A/D conversion circuits, then the dynamic range can be expanded, but conversion errors and noise-related inaccuracies occur during amplification and A/D conversion
Solution Approach 1:
The patent applies preliminary action by performing weighting addition of pixel signals in the analog domain before A/D conversion. Multiple pixel signals are held in capacitors, weighted by adjusting capacitor connections, and added together before conversion to digital values. This prevents conversion errors and noise from affecting the weighting operation, as the weighting is completed in the analog domain where signals can be directly manipulated without quantization errors.
Solution Approach 2:
The patent uses capacitors as intermediary elements to hold and weight pixel signals. The capacitors serve as temporary storage elements that can be connected to the summing node through switches, allowing analog weighting operations. This intermediary approach enables precise analog signal manipulation before final A/D conversion, avoiding the introduction of conversion errors during the weighting process.
2Ease of operation
If weighting addition is performed using digital values after A/D conversion, then the processing is simplified, but errors from amplification and conversion are included in the result
Solution Approach 1:
The patent replaces the mechanical/digital processing approach with an analog electrical system. Instead of converting signals to digital values and performing weighting operations in the digital domain, the patent uses analog capacitors and switches to perform weighting addition electrically before conversion. This substitution maintains simplicity while improving reliability by avoiding the introduction of conversion errors during weighting operations.
3Measurement precision
If multiple pixel signals are held and synthesized using capacitive elements, then accurate weighting addition without conversion errors is achieved, but the circuit complexity increases
Solution Approach 1:
The patent applies universality by designing capacitors and switches that serve multiple functions. The same capacitors are used both for holding pixel signals and for weighting operations by adjusting their connection configurations. The switches serve both to select which capacitors are active and to control the weighting ratios. This multi-functionality reduces the need for separate dedicated components for each function, thereby limiting the increase in circuit complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate weighting addition of pixel signals without conversion errors or noise-related inaccuracies, improving the dynamic range expansion in CMOS-type solid-state image pickup apparatuses.
Implementation Method 1
A/D conversion circuit with capacitive elements that hold and synthesize pixel signals
Implementation Method 2
generating a node potential for digital value generation
Data Source
AI summary
Provided is an ADC in which a plurality of pixel signals input through a vertical signal line of a solid-state image pickup apparatus are held in advance using some capacitors among a plurality of capacitors within the ADC. A potential of a node is generated by the respective pixel signals held in the capacitors. Thereafter, the potential of the node is changed by changing the voltages of counter electrodes of the capacitors, and the digital values of the pixel signals are generated by comparing the potential of the node with a predetermined potential.