Capacitive Alignment Verification for 3D Electronic Stacking
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Solution Overview
Problem
Existing methods for verifying alignment in 3D electronic device stacking, such as those using markers or capacitors, are costly, complex, or lack precision in detecting misalignments.
Innovation Solution
A method involving the use of reference and coupling capacitors to transmit and receive signals, with amplification and comparison of signal amplitudes to detect misalignment, allowing for precise alignment verification without requiring precise capacitance values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If optical detectors are used to verify alignment, then measurement precision is improved, but device complexity and cost increase
Solution Approach 1:
The patent replaces optical detection systems with an electrical measurement system using capacitors and signal transmission. Instead of using optical detectors to measure alignment, the invention uses capacitive coupling between chips to transmit signals and detect misalignment through electrical parameter changes, thereby eliminating complex optical equipment while maintaining measurement precision.
Solution Approach 2:
The patent introduces capacitors as intermediary elements between chips to facilitate alignment verification. The capacitors serve as mediators that transmit signals and enable detection of misalignment through changes in capacitance values, providing a simpler alternative to direct optical detection.
2Device complexity
If capacitor-based alignment verification is used, then device complexity is reduced, but measurement precision deteriorates due to inability to detect small misalignments
Solution Approach 1:
The patent measures misalignment in multiple dimensions by using several capacitors arranged in different spatial configurations. Instead of relying on a single capacitance measurement, the system uses multiple capacitive measurements taken from different orientations and positions to comprehensively detect misalignment in various directions, thereby improving measurement precision while maintaining system simplicity.
Solution Approach 2:
The patent performs preliminary calibration by measuring capacitance values when chips are in known alignment states. This preliminary action establishes reference data that enables more precise detection of actual misalignment conditions, allowing the system to achieve high measurement precision without complex real-time calculations.
3Measurement precision
If multiple capacitors are used for comprehensive alignment verification, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent designs capacitors that serve multiple functions: they are used both for inter-chip signal transmission/communication and for alignment verification. This multi-functionality eliminates the need for separate alignment detection components, thereby improving measurement precision without significantly increasing device complexity.
Solution Approach 2:
The patent combines the alignment verification function with the existing capacitive coupling structures used for chip-to-chip communication. By merging these functions into a single integrated system, the patent achieves comprehensive alignment verification precision while avoiding the complexity increase that would result from adding separate alignment detection hardware.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables high-precision alignment verification in 3D electronic device stacking without the need for expensive optical detectors or complex setups, improving communication efficiency between chips.
Implementation Method 1
coupling said first and second integrated electronic devices by means of a reference capacitor and a first coupling capacitor
Data Source
AI summary
A method for verifying alignment between first and second integrated devices coupled together using a reference and a coupling capacitor, including: transmitting a reference signal on a transmission electrode of the reference capacitor; receiving a coupling signal on a reception electrode of the reference capacitor; amplifying the coupling signal, generating a reception reference signal; generating a reception control signal as a function of the reception reference signal; transmitting a communication signal on an electrode of the coupling capacitor; receiving a reception signal on an electrode of the coupling capacitor; amplifying the reception signal, generating a first compensated signal; controlling a level of amplification of amplifying the coupling signal and the reception signal as a function of the reception control signal; and detecting a possible misalignment between the first and second devices based on an amplitude of the communication signal and an amplitude of the compensated signal.