Capacitive Analog Vector-Matrix Multiplication Circuit

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Solution Overview

Problem

Analog vector-matrix multiplication using non-volatile memory elements is limited by the variability of on- and off-state current, and existing solutions require large SRAM circuits for system state storage, which consume substantial power and are prone to noise from non-uniform resistance states.

Innovation Solution

An array circuit with VMM elements comprising capacitors and non-volatile memory elements, where the NVM elements are connected to capacitors and addressed via row and column input/output lines, allowing for selective storage and retrieval of matrix states without direct reliance on resistance states, reducing power consumption and noise susceptibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If non-volatile memory elements are used for analog VMM, then storage durability is improved, but multiplication accuracy deteriorates due to current variability

Engineering Contradiction:
Improvestorage durabilityVSAvoidmultiplication accuracy
Core Design Contradiction:
Duration of action of stationary objectVSMeasurement precision

Solution Approach 1:

The patent introduces capacitors as intermediary elements between the NVM elements and the readout circuitry. The capacitors convert the resistance-based storage states into voltage signals, serving as a mediator that translates the non-volatile memory states into a format suitable for accurate analog multiplication, thereby resolving the accuracy issue while maintaining durability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the fundamental parameter used for information storage from resistance (in NVM elements) to capacitance (in the capacitor elements). This parameter transformation allows the system to maintain the durability benefits of non-volatile memory while achieving higher accuracy through the voltage-based readout mechanism

Inventive Principle:
Principle #35Parameter changes

2Speed

If SRAM circuits are used to store system state, then access speed is improved, but power consumption increases substantially

Engineering Contradiction:
Improveaccess speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent creates a hybrid memory architecture where NVM elements provide durable, low-power storage of matrix states, while capacitors provide fast, low-power readout capability. This copying approach allows the system to benefit from both the durability of non-volatile memory and the speed of volatile memory without the high power consumption of SRAM

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The capacitors in the patent can be considered disposable in the sense that they are reset between operations and do not require the complex, power-intensive structures of SRAM. They provide sufficient functionality for the readout operation and can be reused without the overhead of maintaining complex state machinery

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Device complexity

If NVM elements are used directly for multiplication, then device simplicity is improved, but noise susceptibility increases due to non-uniform resistance states

Engineering Contradiction:
Improvedevice simplicityVSAvoidnoise susceptibility
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The capacitors serve as intermediaries that convert the resistance-based NVM states into voltage signals, isolating the multiplication circuitry from the non-uniform resistance variations. This mediator approach allows the system to maintain simplicity by using basic capacitor-NVM combinations while reducing noise susceptibility through the voltage conversion process

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables durable, low-power storage of matrix states and reduces noise susceptibility, improving the accuracy and efficiency of vector-matrix multiplication by using charge stored in capacitors rather than resistance states.

Implementation Method 1

application of the voltage to the capacitor causes the capacitor to charge, and a charge that is proportional to the voltage applied to the capacitor is drawn from the column output line

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS11494464B1Analog vector-matrix multiplication by capacitive elements with resistive state storage
Publication Date: 2022.11.08 NATIONAL TECHNOLOGY & ENGINEERING SOLUTIONS OF SANDIA LLC
  • US11494464B1 patent drawing
  • US11494464B1 patent drawing
  • US11494464B1 patent drawing

AI summary

An array circuit includes a plurality of vector-matrix multiplication (VMM) elements arranged in rows and columns. The VMM elements are configured to collectively perform multiplication of an input vector by a programmed input matrix to generate a plurality of output values that are representative of a result matrix that is the result of multiplication of the input vector and the input matrix. The VMM elements store states of the input matrix. Input voltages to the array are representative of elements of the input vector. A VMM element draws charge from a column read line based upon charging of a capacitor in the VMM. An integrator circuit connected to the column read line outputs a voltage that is indicative of a total charge drawn from the column read line by elements connected to the read line, which voltage is further indicative of an element of a result matrix.