Capacitively Coupled CMOS Image Sensor for High Dynamic Range
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Solution Overview
Problem
Conventional CMOS image sensors face limitations in achieving high dynamic range and high frame rates due to the need for multiple exposures and increased circuit complexity, which complicates pixel design and fabrication, especially in backside illuminated sensors where light path obstacles hinder photon detection.
Innovation Solution
The use of asynchronous self-reset with residue digitization and capacitive coupling between two layers of CMOS image sensors, allowing for extended dynamic range without the need for silicon through vias or indium bumps, enabling backside illumination and reducing fabrication costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional CMOS technology uses multiple exposures to achieve high dynamic range, then dynamic range is improved, but frame rate decreases and exposure time is limited
Solution Approach 1:
The patent divides the dynamic range measurement into multiple segments by using multiple integrators with different integration times within a single exposure. Each integrator captures a different portion of the dynamic range, allowing the system to achieve high dynamic range without multiple exposures, thereby maintaining high frame rates.
Solution Approach 2:
The patent transitions from temporal segmentation (multiple exposures over time) to spatial segmentation (multiple integrators simultaneously within the same pixel). This dimensional change allows all integrators to operate in parallel during a single exposure, eliminating the time penalty of sequential exposures and enabling high frame rates.
2Measurement precision
If pixel level circuitry is added to increase dynamic range in a single exposure, then dynamic range is improved, but pixel complexity and transistor count increase
Solution Approach 1:
The patent merges multiple integrator functions into a unified pixel structure where several integrators share common components such as the photodetector and readout circuitry. This consolidation achieves high dynamic range through multiple integration times while avoiding a proportional increase in pixel complexity, as shared components reduce the total transistor count compared to fully independent integrators.
Solution Approach 2:
The patent implements multi-functional circuit blocks that serve multiple purposes: the same photodetector feeds multiple integrators, and the readout circuitry can selectively read from any integrator. This universality allows a single pixel to perform multiple integration functions without requiring separate dedicated circuitry for each function, thereby controlling pixel complexity.
3Illumination intensity
If backside illumination is used to remove light path obstacles, then photon detection is improved, but fabrication complexity increases due to interconnect requirements
Solution Approach 1:
The patent inverts the conventional illumination approach by implementing backside illumination, where light enters through the substrate rather than the front. This inversion removes metal interconnects and other front-side structures from the light path, significantly improving photon detection efficiency. The fabrication complexity is managed through the capacitive coupling technique that simplifies interlayer connections.
Solution Approach 2:
The patent introduces capacitive coupling as an intermediary mechanism to transfer signals between the front-side pixel circuitry and back-side readout circuits. This capacitive interface acts as a mediator that enables communication across the substrate without requiring complex through-silicon vias or indium bump interconnects, thereby reducing fabrication complexity while maintaining backside illumination benefits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for capturing both dim and bright objects in a single exposure with high dynamic range and high scanning rates, while simplifying the fabrication process and reducing costs by eliminating the need for complex interconnects, thus overcoming the limitations of conventional CMOS image sensors.
Implementation Method 1
a first readout integrated circuit capacitively coupled to a second readout integrated circuit
Implementation Method 2
Each pixel contains both a photo sensing means and at least one other active component which create a charge that is converted to a voltage or a current signal
Data Source
AI summary
The images sensor includes a readout circuit capacitatively coupled to a memory circuit. The readout circuit includes: (i) a photon detector to receive a plurality of photons and to provide a charge signal corresponding to the received photons, (ii) a resettable integrator that is reset multiple times over a single exposure time and provides an analog representation of the incident photons during the last integration cycle, and (iii) a comparator that monitors the integrator output and generates a reset pulse when the integrator reaches a built-in threshold value. The memory circuit includes: (i) a receiver circuit that detects the output of the digital driver in the front-end readout circuit via capacitive coupling and generates a digital voltage pulse for each received signal, and (ii) a digital counting memory to count the received pulses to provide a coarse digital representation of how many times the integrator is reset.