Capacitive MOS Current Mirror for Faster Output Response
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Solution Overview
Problem
Existing current copying devices, such as current mirrors with MOS transistors, experience delays in modifying the output current in response to changes in the input current when used for charging or discharging capacitive elements.
Innovation Solution
The proposed device includes a first resistor connected to the input node, a MOS transistor with its source connected to the supply voltage and drain connected to the output node, a capacitor coupling the input node to the transistor's gate, and a biasing circuit with additional MOS transistors and resistors to enhance the response speed of the output current to input current modifications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a known current mirror device is used to copy current, then the output current follows the input current, but there is a delay when charging or discharging capacitive elements
Solution Approach 1:
The capacitor C1 is pre-charged through resistor R1 during the steady state before a transition occurs. When the input current changes, the pre-charged capacitor immediately discharges or charges through the MOS transistor M2, providing a fast preliminary action that eliminates the delay typically associated with capacitive charging/discharging paths. This preliminary charging of the capacitor allows the output current to respond instantaneously to input changes.
Solution Approach 2:
The capacitor C1 acts as an intermediary element between the input current and the gate of MOS transistor M2. Instead of directly controlling the transistor gate through a resistive path, the capacitor mediates the signal transmission, allowing rapid voltage changes at the gate in response to input current changes. This intermediary capacitive coupling accelerates the response speed while the resistor R1 provides the necessary biasing current.
2Productivity
If the response speed is increased by reducing delay, then the slew rate increases, but power consumption or device complexity may increase
Solution Approach 1:
The invention changes the operating parameters of the current mirror by introducing a capacitor C1 with specific capacitance value and a resistor R1 with specific resistance value. These parameter choices optimize the time constant (RC) to achieve fast response while maintaining reasonable power consumption. The MOS transistor M2 is biased in a specific operating region to maximize transconductance and minimize delay, achieving high slew rate without excessive complexity.
Solution Approach 2:
The resistor R1 serves multiple functions: it provides biasing current to charge the capacitor C1 during steady state, limits the current to protect the capacitor, and sets the time constant for the RC circuit. The capacitor C1 simultaneously acts as a signal coupling element, a timing element, and a means to accelerate the response. The MOS transistor M2 functions both as the current copying element and as the switching element that responds to voltage changes. This multi-functionality reduces the need for additional components, thereby limiting device complexity while achieving high productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the delay between input and output current modifications, increasing the slew rate and transconductance gain while maintaining low power consumption and surface area, allowing faster charging or discharging of capacitive loads.
Implementation Method 1
a first capacitor connected between the input node and the gate of the first MOS transistor
Implementation Method 2
a first MOS transistor having a source connected to the first node and a drain coupled to the output node of the device
Implementation Method 3
a first resistor having a first terminal connected to the input node and a second terminal coupled to a first node configured to receive a first supply voltage
Data Source
AI summary
In an embodiment a device includes an input node configured to receive a first current, an output node configured to provide a second current determined by the first current, a first resistor having a first terminal connected to the input node and a second terminal coupled to a first node configured to receive a first supply voltage, a first MOS transistor having a source connected to the first node and a drain coupled to the output node of the device, a second resistor having a first terminal connected to a gate of the first MOS transistor, a biasing circuit configured to provide a biasing voltage on a second terminal of the second resistor and a first capacitor connected between the input node and the gate of the first MOS transistor.