Capacitive Decoupling for Mid-Voltage Power Rails
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Solution Overview
Problem
Conventional cascode architectures in semiconductor processing suffer from noise coupling from full-voltage rails to mid-voltage rails due to AC voltage dividers, leading to inefficiencies in capacitive decoupling, particularly in high current draw devices like input/output drivers, and are constrained by packing density requirements.
Innovation Solution
The implementation of separate capacitive decoupling for each power rail using a first pair of capacitors between the power rail and a midpoint node, and a second pair between the midpoint node and the ground rail, allowing for independent capacitive decoupling of power delivered to each rail, thereby reducing noise coupling and improving capacitive efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single stacked capacitor configuration is used for decoupling both full-voltage and mid-voltage rails, then device complexity is reduced, but noise coupling from full-voltage rail to mid-voltage rail occurs
Solution Approach 1:
The patent divides the decoupling capacitance into separate stacked capacitor configurations for each power rail. The first stacked configuration decouples the full-voltage rail while the second stacked configuration decouples the mid-voltage rail. This segmentation prevents noise coupling between rails by providing independent decoupling paths for each voltage level.
2Reliability
If more raw capacitance is provided on the die to improve decoupling, then capacitive decoupling efficiency is improved, but die size increases
Solution Approach 1:
The patent utilizes vertical stacking of capacitors in multiple tiers to increase decoupling capacitance without proportionally increasing die area. By arranging capacitors in stacked configurations where capacitors are connected in series vertically between power rails and ground, the patent achieves high decoupling efficiency while maintaining compact footprint suitable for high-density packaging.
3Ease of manufacture
If conventional capacitor stacking is used between ground rail and full-voltage rail, then manufacturing is simplified, but noise suppression performance deteriorates due to AC voltage divider effect
Solution Approach 1:
The patent segments the decoupling function into separate stacked capacitor configurations for each power rail. Instead of using a single capacitor stack that creates an AC voltage divider, the patent provides dedicated stacked capacitor configurations that decouple each rail independently, eliminating the noise coupling problem while maintaining manufacturing simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces noise on mid-voltage rails and enhances capacitive decoupling efficiency, providing better power delivery and noise suppression without increasing die size, as demonstrated by simulation results showing reduced noise levels on mid-voltage rails and acceptable noise levels on full-voltage rails.
Implementation Method 1
The first of the two capacitors is electrically coupled between the first power rail and the midpoint node and the second of two capacitors is electrically coupled between the midpoint node and the ground rail to provide capacitive decoupling for power delivered to the first power rail
Data Source
AI summary
Capacitive decoupling circuits and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a semiconductor chip with a first power rail for a first no-load bias level and a ground rail. A first voltage divider is electrically coupled between the first power rail and the ground rail and has a midpoint node. A first pair of capacitors is electrically coupled between the first power rail, the midpoint node and the ground rail to provide capacitive decoupling for power delivered to the first power rail. A second power rail has a second no-load bias less than the first no-load bias. A second pair of capacitors is electrically coupled between the ground rail and the second power rail to provide capacitive decoupling for power delivered to the second power rail.