Capacitive Feedback Signal Driver for I2C Edge-Rate Control
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Solution Overview
Problem
Existing edge-rate control methods for NMOS pull-down devices in I2C bus systems face challenges in controlling the edge rate effectively, particularly at higher bus speeds, due to issues like increased charge time and signal glitches caused by capacitive feedback, which complicates meeting the requirements for maximum and minimum falling-edge transition timings.
Innovation Solution
A circuit arrangement that includes a feedback capacitor coupled to the gate of a transistor using an isolation switch, with a charge distribution capacitor to selectively remove charge from the feedback capacitor, allowing for independent control of the edge rate and reducing unwanted enabling of the pull-down device, thereby improving edge-rate control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If capacitive feedback is used to control the edge rate of NMOS pull-down device, then the falling-edge transition timing can be controlled, but the charge time increases and signal glitches occur
Solution Approach 1:
The feedback capacitor is segmented into multiple smaller capacitors that can be independently controlled. This segmentation allows the feedback effect to be applied in a controlled manner during the falling edge transition, while preventing excessive charge accumulation that would increase charge time and cause signal glitches.
Solution Approach 2:
The feedback capacitors are dynamically switched into and out of the circuit based on the signal transition state. During falling edge transitions, the capacitors are activated to control the edge rate. During rising edge transitions or stable states, the capacitors are deactivated to prevent unwanted charge accumulation and signal glitches.
2Manufacturing precision
If capacitive feedback is used to control the edge rate, then falling-edge transition can be controlled, but unwanted enabling of pull-down device occurs during rising-edge transition
Solution Approach 1:
The feedback capacitors are dynamically controlled to be active only during falling edge transitions. During rising edge transitions, the capacitors are switched out of the circuit, preventing them from causing unwanted enabling of the pull-down device and maintaining signal stability.
Solution Approach 2:
The circuit proactively prevents unwanted pull-down device enabling by switching out the feedback capacitors before rising edge transitions occur. This preliminary action eliminates the potential for signal glitches and maintains reliable signal transmission.
3Speed
If stronger pull-up resistor is used to meet maximum rising slew transition timing, then rising edge timing requirement is met, but falling-edge transition control becomes more difficult
Solution Approach 1:
The feedback mechanism is segmented into multiple independently controllable capacitors that can be selectively activated. This allows precise control of the falling edge transition by applying feedback only when needed, independent of the pull-up resistor strength used for rising edge control.
Solution Approach 2:
The feedback capacitors are dynamically switched based on the signal transition direction. During falling edge transitions, the capacitors are activated to control the edge rate regardless of pull-up resistor strength. During other phases, they are deactivated, allowing the pull-up resistor to freely control the rising edge speed without interference.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively controls the edge rate of the output signal, reducing charge time and minimizing signal glitches, enabling compliance with faster bus mode requirements while maintaining reliable performance across varying bus capacitance and pull-up resistor values.
Implementation Method 1
A feedback capacitor is coupled to an output signal of a bus and selectively coupled to a gate of a transistor using an isolation switch
Implementation Method 2
A first charge distribution capacitor is selectively coupled to the feedback capacitor using a switch. The switch is enabled in response to the output signal reaching an output voltage and disabled in response to the first charge distribution capacitor reaching a reference voltage
Data Source
AI summary
Edge-rate control circuits and methods are implemented using a variety of arrangements and methods. Using one such method, an output signal of a bus is controlled by decoupling a feedback capacitor (116) from a gate of a transistor (108) using an isolation switch (106). The transistor (108) is used to control the output signal. A predetermined amount of charge is removed from the feedback capacitor (116) using a charge distribution capacitor (114) that is selectively coupled to the feedback capacitor (116) using a switch (112). The switch (112) is enabled in response to the output signal reaching an output voltage and disabled in response to the charge distribution capacitor (114) reaching a reference voltage.


