Capacitive Multiple Filter Circuit for DC Offset Cancellation
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Solution Overview
Problem
In communication systems, especially those using advanced wireless standards like 5G, direct current (DC) offset issues occur when receivers and transmitters operate simultaneously, leading to performance degradation due to signals with similar frequencies, causing DC portions in mixed signals that hinder effective reception.
Innovation Solution
A capacitor circuit and capacitive multiple filter design that includes a mixer module with a DC offset circuit and controller, which adjusts the DC portion of mixed signals by generating control signals to reduce DC offset, enhancing signal accuracy and system performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a receiver and transmitter operate simultaneously in the same frequency band (full-duplex mode), then transmission capability is enhanced, but DC offset occurs in mixed signals causing performance degradation
Solution Approach 1:
The patent extracts and removes the DC offset component from the mixed signal using a dedicated DC offset circuit. The circuit separates the harmful DC portion from the useful AC signal components, allowing the transmitter and receiver to operate simultaneously without the DC offset degrading signal reception quality
Solution Approach 2:
The patent introduces an intermediary DC offset circuit between the mixer and subsequent signal processing stages. This intermediary circuit actively compensates for DC offset by generating counterbalancing signals, enabling full-duplex operation while maintaining signal integrity
2Adaptability or versatility
If signals with similar frequencies are mixed in the mixer, then frequency conversion is achieved, but DC portions are generated in the output signals preventing effective reception
Solution Approach 1:
The patent converts the harmful DC offset effect into a useful function by using it as a reference signal for DC offset cancellation. The DC portion generated during frequency conversion is extracted and used to generate compensating signals that actively cancel the offset in subsequent processing stages
Solution Approach 2:
The patent introduces a DC offset circuit as an intermediary component between the mixer and signal processing stages. This circuit acts as a mediator that separates and compensates for DC offset, allowing frequency conversion to proceed while eliminating the harmful DC portions from the output signals
Data Source
AI summary
A capacitor circuit includes a first terminal, a first to a third transistor and a first capacitor. The first transistor includes a first terminal configured to be coupled to a first current source and the first terminal of the capacitor circuit, and a second terminal coupled to a reference voltage terminal. The second transistor includes a first terminal configured to be coupled to a second current source, a second terminal coupled to the reference voltage terminal, and a control terminal coupled to the first terminal of the second transistor and a control terminal of the first transistor. The third transistor includes a first terminal configured to be coupled to a third current source and the first terminal of the first transistor, a second terminal coupled to the reference voltage terminal, and a control terminal coupled to the control terminal of the second transistor. The first capacitor includes a first terminal coupled to the first terminal of the capacitor circuit, and a second terminal coupled to the control terminal of the first transistor.