Capacitive-Coupled Inverter DAC Cell for High-Frequency Linearity
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Solution Overview
Problem
Inverter-based digital-to-analog conversion cells in DACs suffer from parasitic resistances and capacitances, which affect linearity, especially at high operating frequencies.
Innovation Solution
The implementation of an inverter circuit with a coupling path comprising a capacitive element, which is coupled between the source terminals of transistors in the inverter circuit to support the charging and discharging of parasitic capacitances, thereby reducing their impact on signal linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If inverter-based digital-to-analog conversion cells are used in DACs, then the conversion function is achieved, but parasitic resistances and capacitances degrade linearity especially at high operating frequencies
Solution Approach 1:
A coupling path comprising a capacitive element is introduced as an intermediary component between the source terminals of transistors in the inverter circuit. This coupling path acts as a mediator to support the charging and discharging of parasitic capacitances, thereby reducing their harmful effects on signal linearity while maintaining the normal inverter operation
Solution Approach 2:
The invention converts the harmful parasitic capacitances into a beneficial effect by providing a dedicated coupling path that utilizes these parasitic capacitances for charge storage and release. The parasitic capacitances that previously degraded linearity are now actively used to support voltage transitions, improving linearity especially at high frequencies
2Measurement precision
If conventional inverter circuits are used without additional coupling paths, then the circuit complexity is low, but the Spurious-Free Dynamic Range (SFDR) is degraded due to parasitic effects
Solution Approach 1:
The inverter circuit is segmented by introducing a separate coupling path that is coupled between specific source terminals of transistors. This segmentation allows the parasitic capacitance management function to be separated from the main inverter operation, improving SFDR while adding minimal complexity to the overall circuit structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the linearity of the inverter circuit, particularly at high frequencies, by mitigating the effects of parasitic capacitances, resulting in improved Spurious-Free Dynamic Range (SFDR) and reduced harmonic distortions.
Implementation Method 1
a coupling path comprising a capacitive element, wherein the coupling path is coupled between a source terminal of one of the plurality of transistors of the first conductivity type and a source terminal of one of the plurality of transistors of the second conductivity type
Data Source
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AI summary
An inverter circuit is provided. The inverter circuit includes a first node for coupling to a first electrical potential and a second node for coupling to a second electrical potential different from the first electrical potential. Further, the inverter circuit includes a third node configured to output an output signal of the inverter circuit. The inverter circuit includes a plurality of transistors of a first conductivity type coupled in series between the first node and the third node. Additionally, the inverter circuit includes a plurality of transistors of a second conductivity type coupled in series between the third node and the second node. The second conductivity type is different from the first conductivity type. The inverter circuit further includes at least one coupling path comprising a capacitive element. The at least one coupling path is coupled between a source terminal of one of the plurality of transistors of the first conductivity type and a source terminal of one of the plurality of transistors of the second conductivity type.