Capacitive Level Shift Circuit for Fast Boosting With Safe MOSFET Voltage
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Solution Overview
Problem
Conventional level shift circuitries face challenges in achieving high-speed operation without increasing power consumption and maintaining transistor withstand voltage, often requiring high-withstand-voltage MOSFETs at a higher cost.
Innovation Solution
The proposed level shift circuitry incorporates a first and second impedance, n-type MOSFET transistors, a current source, and a capacitor to boost input signals to a level equal to or less than the positive power supply voltage, allowing high-speed operation while minimizing power consumption and transistor stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the output signal voltage level is increased to achieve high-speed operation, then the signal boosting performance is improved, but the voltage applied between MOSFET terminals may exceed the allowable withstand voltage, causing transistor breakdown
Solution Approach 1:
The patent divides the single high-voltage MOSFET into multiple lower-voltage MOSFETs connected in series. Each MOSFET experiences only a portion of the total voltage, ensuring that no single transistor exceeds its withstand voltage limit while collectively handling the high voltage required for fast signal boosting.
Solution Approach 2:
The patent introduces intermediate voltage division circuits and control mechanisms between the power supply and MOSFETs. These intermediary elements distribute and regulate the voltage across multiple transistors, preventing any single MOSFET from experiencing excessive voltage while maintaining the overall high-voltage output capability.
2Reliability
If high-withstand-voltage MOSFETs are used to prevent transistor breakdown, then the reliability is improved, but the cost increases
Solution Approach 1:
Instead of using a single expensive high-withstand-voltage MOSFET, the patent segments the voltage handling function across multiple standard-voltage MOSFETs. This approach reduces cost by using readily available, lower-cost transistors while achieving the same reliability through distributed voltage management.
Solution Approach 2:
The patent employs multiple standard-voltage MOSFETs that are cheaper and more readily available than high-withstand-voltage alternatives. By using these cost-effective components in a series configuration with proper voltage distribution, the system achieves the required reliability without the premium cost of specialized high-voltage transistors.
3Power
If conventional level shift circuitry is used to boost signal voltage, then the power supply voltage utilization is improved, but the transistor breakdown risk increases due to excessive voltage application
Solution Approach 1:
The patent segments the voltage stress across multiple MOSFETs connected in series, so each transistor experiences only a fraction of the total power supply voltage. This allows full utilization of the available power supply voltage for signal boosting while preventing excessive voltage stress on any individual transistor.
Solution Approach 2:
The patent changes the operational parameters of the MOSFETs by operating multiple lower-voltage transistors in series rather than a single high-voltage transistor. This parameter change enables the circuit to utilize the full power supply voltage range while keeping the voltage across each individual device within safe operating limits.
Data Source
AI summary
A level shift circuitry includes a first impedance, a second impedance, a first transistor, a second transistor, a current source, and a first capacitor. The first impedance and the second impedance have a first end connected to a positive-side power supply voltage. The first transistor has a control terminal and a first end connected to a second end of the first impedance. The second transistor has a control terminal, a first end connected to a second end of the second impedance, and a second end connected to a second end of the first transistor. The current source has a first end connected to the second end of the first transistor and a second end connected to a negative-side power supply voltage. The first capacitor has a first end connected to the second end of the second impedance and a second end.