Capacitive Level Shifter Circuit to Prevent Cross-Conduction
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Solution Overview
Problem
Existing level shifter circuits for non-volatile memory devices, such as phase-change memory, fail to meet requirements for fast level transitions, low power consumption, and small area occupation, particularly in interfacing low-voltage and high-voltage circuit portions with minimal delays to avoid current cross-conductions.
Innovation Solution
A level shifter circuit with a high-level shifting stage that includes a latching core, capacitive coupling units, and decoupling units to achieve simultaneous transitions in medium and high-voltage domains, reducing energy consumption and area occupation by isolating latching units during switching, and a reset generation stage for generating level-shifted reset signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional level shifter circuits are used to interface low-voltage and high-voltage circuit portions, then voltage level shifting is achieved, but fast level transitions and minimal delays between transitions cannot be ensured, causing current cross-conductions
Solution Approach 1:
The level shifter circuit is divided into separate medium-voltage domain circuitry and high-voltage domain circuitry, each with independent level shifting paths. This segmentation allows simultaneous level transitions in both domains without interference, preventing current cross-conductions while maintaining fast transition speeds.
Solution Approach 2:
The circuit uses pre-charged capacitors and proactive control signals to prepare the medium-voltage domain circuitry before high-voltage transitions occur. This preliminary action ensures that level transitions are synchronized and completed before current cross-conduction can occur between domains.
2Productivity
If multiple level shifting stages are added to achieve simultaneous transitions in medium and high-voltage domains, then parallel level shifting capability is improved, but device complexity and area occupation increase
Solution Approach 1:
The level shifter circuit uses shared control signals and common reference voltage generators that serve both medium-voltage and high-voltage domains. This multi-functionality allows parallel level shifting operations without requiring completely separate control paths, thereby reducing overall circuit complexity while maintaining high productivity.
Solution Approach 2:
The patent merges the control logic for medium-voltage and high-voltage level shifting into a unified control structure. By combining control functions and sharing common components such as reference voltage generators and control signal distributors, the circuit achieves parallel processing capability without proportionally increasing complexity.
3Reliability
If traditional level shifter designs are used, then voltage interfacing is achieved, but power consumption is high due to sequential operations and current cross-conductions
Solution Approach 1:
The level shifter employs periodic clocked operations with controlled timing cycles that coordinate transitions between voltage domains. By using periodic control signals that synchronize medium-voltage and high-voltage transitions, the circuit minimizes the duration of current cross-conductions and reduces overall power consumption while maintaining reliable voltage interfacing.
Data Source
AI summary
A level shifter circuit configured to shift an input signal switching within a first voltage range to generate a first output signal correspondingly switching within a second voltage range higher than the first voltage range. The level shifter circuit including a latching core having latching input and output terminals and a supply line configured to be supplied by a supply voltage, and a reference line configured to be coupled to a reference voltage. Capacitive coupling elements are coupled to the latching input and output terminals of the latching core. A driving stage is configured to bias the capacitive coupling elements with biasing signals generated based on the input signal. A decoupling stage is configured to be driven by the driving stage through the capacitive coupling elements to decouple the supply line from the supply voltage and the reference line from the reference voltage during switching of the input signal.