Capacitive-Coupled Level Shifter With Common-Mode Noise Rejection
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Solution Overview
Problem
Existing level shifters face challenges in efficiently interfacing between different voltage domains, particularly in high-speed and high-power applications, with issues such as slow performance, high current consumption, and vulnerability to noise due to the use of high-voltage components and complex parasitic modeling.
Innovation Solution
A capacitive-coupled level shifter design that includes a comparator circuit and symmetric capacitive divider branches to cancel out common mode voltage, combined with resistor ladders for DC biasing and speed booster circuits to enhance gain, allowing for high-speed operation and reduced dependency on temperature and process variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If cascoding high voltage devices is used to extend voltage range, then the voltage handling capability is improved, but the speed performance deteriorates and layout area increases
Solution Approach 1:
The circuit is divided into two independent voltage domains (first voltage domain with lower voltage and second voltage domain with higher voltage), each operating at optimal speeds for their respective voltage levels. The level shifter acts as an interface between these segmented domains, allowing the high-voltage side to handle voltage stress while the low-voltage side maintains high-speed operation.
Solution Approach 2:
The level shifter serves as an intermediary component between the low-voltage control circuit and the high-voltage power stage. It translates control signals from the low-voltage domain to the high-voltage domain without requiring the high-voltage devices to operate at high speeds, thus resolving the speed-voltage tradeoff.
2Strength
If high voltage range is extended beyond single component capability, then voltage handling is improved, but device complexity increases due to cascoding requirements
Solution Approach 1:
The system is segmented into independent voltage domains with dedicated circuits for each domain. The first voltage domain contains control circuits operating at lower voltages, while the second voltage domain contains power devices operating at higher voltages, simplifying the design and analysis of each segment.
Solution Approach 2:
The level shifter acts as an intermediary that bridges the two voltage domains, eliminating the need for complex cascoding arrangements. This intermediary approach reduces device complexity by allowing each domain to be designed independently with standard components.
3Speed
If transformer or capacitive level shifting is used for high speed applications, then speed performance is improved, but current consumption increases
Solution Approach 1:
The level shifter uses periodic pulse sequences to refresh the gate driver stage, preventing false triggering due to noise. This periodic action maintains signal integrity at high speeds while optimizing current consumption by only refreshing when necessary, rather than continuous operation.
4Reliability
If control signal is transformed into continuous pulse sequence, then noise immunity is improved, but current consumption increases
Solution Approach 1:
The control signal is transformed into a periodic pulse sequence that refreshes the gate driver stage at optimized intervals. This periodic refreshing provides noise immunity by preventing false triggering while minimizing current consumption by avoiding continuous operation. The pulse repetition rate is optimized to balance noise immunity and power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The capacitive-coupled level shifter provides high-speed performance, minimizes layout area, and reduces current consumption while ensuring reliable signal integrity by blocking DC components and rejecting common mode noise, suitable for high-voltage applications like DC-DC converters and gate drivers.
Implementation Method 1
a capacitive divider circuit comprising a first capacitive divider branch coupling the positive input terminal of the input to a positive input terminal of the comparator circuit and a second capacitive divider branch coupling the negative input terminal of the input to a negative input terminal of the comparator circuit
Implementation Method 2
the first capacitive divider branch and the second capacitive divider branch being symmetric so as to cancel out a common mode voltage of the modulated signal
Data Source
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AI summary
A capacitive-coupled level shifter (502) includes: an input (302) having a positive input terminal (INP) and a negative input terminal (INN), the input configured to receive a modulated signal in a first voltage domain; a comparator circuit (506) configured to shift the modulated signal to a second voltage domain higher than the first voltage domain; and a capacitive divider circuit (504) comprising a first capacitive divider branch (CB1) coupling the positive input terminal of the input to a positive input terminal (A) of the comparator circuit, a second capacitive divider branch (CB2) coupling the negative input terminal of the input to a negative input terminal (B) of the comparator circuit, and a third capacitive divider branch (CB3) coupling a reference terminal (INR) of the input to a common mode reference terminal (REF) of the comparator circuit. The first capacitive divider branch and the second capacitive divider branch are symmetric so as to cancel out a common mode voltage of the modulated signal. A level shifter system which includes the capacitive-coupled level shifter is also described.