Capacitive Voltage Level Translator for Balanced Signal Transitions

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Solution Overview

Problem

Conventional voltage level translators often exhibit unequal rise and fall times and long rise delays, which can lead to unacceptable total delays and require additional circuits to prevent shoot-through current, while also consuming high power and being limited to specific power supply ranges.

Innovation Solution

A voltage level translator design that includes an inverter circuit with a capacitor having a capacitance approximately 10 times larger than the load, allowing for equal rise and fall times and fast transition between voltage levels, and operates across a wide range of power supplies with low current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional voltage level translators are used, then voltage level translation is achieved, but rise and fall times are unequal and propagation delay is long

Engineering Contradiction:

Improvetransition speedVSAvoidpropagation delay

Core Design Contradiction:

SpeedVSLoss of time

Solution Approach 1:

The patent applies asymmetry by using a capacitor with capacitance approximately 10 times larger than the load capacitance. This asymmetric capacitance ratio compensates for the inherent asymmetry in CMOS inverter switching characteristics, enabling equal rise and fall times despite the different charging/discharging paths in the circuit.

Inventive Principle:

Principle #4Asymmetry

Solution Approach 2:

The patent changes the capacitance parameter of the coupling capacitor to be approximately 10 times the load capacitance. This parameter adjustment optimizes the voltage level translation performance by balancing the rise and fall times, directly addressing the speed and delay issues in conventional translators.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If conventional voltage level translators are used, then voltage level translation is achieved, but additional circuits are required to prevent shoot-through current

Engineering Contradiction:

Improveshoot-through current preventionVSAvoidcircuit complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the need for additional shoot-through current prevention circuits by using the asymmetric capacitance ratio. The large coupling capacitor naturally prevents shoot-through current by maintaining proper voltage levels during transitions, simplifying the overall circuit architecture while maintaining reliability.

Inventive Principle:

Principle #2Taking out (Extraction)

3Reliability

If conventional voltage level translators are used, then voltage level translation is achieved, but power consumption is high

Engineering Contradiction:

Improvetranslation functionalityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements self-service by using the large coupling capacitor to naturally manage the voltage translation process. The capacitor stores and releases energy during transitions, reducing the need for continuous power supply and minimizing static power consumption while maintaining reliable translation functionality.

Inventive Principle:

Principle #25Self-service

4Reliability

If conventional voltage level translators are used, then voltage level translation is achieved, but operation is limited to specific power supply ranges

Engineering Contradiction:

Improvetranslation functionalityVSAvoidpower supply range

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent achieves universality by designing a voltage level translator that operates effectively across a wide range of power supply voltages. The asymmetric capacitance ratio configuration allows the circuit to adapt to different supply voltages (e.g., 1.8V to 3.3V, 3.0V to 5.0V) without requiring redesign, making it universally applicable to various voltage domains.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution achieves equal rise and fall times, reduces propagation delay, and operates efficiently across a wide power supply range with low current consumption, addressing the limitations of conventional translators.

Implementation Method 1

A capacitor having a first end connected to the output of the inverter circuit and a second end connected to a load. A capacitance of the capacitor is selected to be approximately 10 times as large as a capacitance of the load.

Methodology Applied

Scientific EffectCapacitance: Capacitance

Data Source

PatentUS9172374B2Voltage level translator

Publication Date: 2015.10.27 NXP BV

AI summary

A voltage level translator includes an inverter circuit configured to switch an output of the inverter circuit between a first voltage level and a second voltage level. The voltage level translator also includes a capacitor connected to the output of the inverter circuit. The voltage level translator also includes a load connected to the capacitor. The capacitance of the capacitor is approximately 10 times larger than a capacitance of the load. An output signal of the voltage level translator has at least one of a different voltage swing and a different voltage domain than an input signal to the inverter circuit.