Capacitive-Load Amplifier Compensation Using ESR-Tracked Zero-Pole

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Wide band amplifiers face stability issues due to multi-pole responses, and conventional methods to improve stability, such as adding pole zero pairs, are not sufficient.

Innovation Solution

The amplifier design incorporates a zero-pole dependent on equivalent series resistance (ESR) and load, utilizing a cascade arrangement of differential amplifiers with specific capacitor ratios to control the position of the zero-pole, and a feedback stage to provide feedback voltage, enhancing stability by tracking the output pole.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional pole-zero pairs are added to improve stability, then phase margin is improved, but the solution is insufficient for wide band amplifiers with multi-pole response

Engineering Contradiction:
ImprovestabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the parameters of existing circuit elements (capacitors C1 and C2) to create a Miller effect that generates beneficial zeros in the transfer function. By adjusting capacitor values (C1=150fF, C2=10pF) and utilizing the inherent multi-pole response of the wide band amplifier, the circuit transforms the problematic multi-pole characteristics into stable operation without adding complex external compensation networks.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces intermediate capacitive elements (C1 and C2) that act as mediators between the amplifier stages. These capacitors create Miller effect zeros that compensate for the multi-pole response, serving as an intermediary mechanism to improve stability without requiring direct modification of the amplifier core or addition of complex feedback networks.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If Miller effect zeros are generated using capacitors C1 and C2, then stability is improved, but the amplifier must drive external capacitive loads

Engineering Contradiction:
ImprovestabilityVSAvoidcapacitive load effects
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent employs feedback mechanisms where the Miller effect zeros generated by capacitors C1 and C2 create a feedback effect that counteracts the destabilizing influence of external capacitive loads. The feedback stage utilizes these zeros to maintain phase margin and stability even when driving significant capacitive loads, effectively using feedback to overcome the harmful effects of the load capacitance.

Inventive Principle:
Principle #23Feedback

3Productivity

If the amplifier stage uses multiple differential amplifiers, then gain and bandwidth are improved, but multi-pole response causes stability issues

Engineering Contradiction:
ImprovebandwidthVSAvoidstability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent converts the harmful multi-pole response inherent in wide band amplifiers into a beneficial effect by using the Miller effect. The multiple poles that would normally cause instability are transformed into stable operation through the generation of zeros by capacitors C1 and C2, which are positioned to compensate for the multi-pole characteristics. This approach maintains high bandwidth while achieving stability by turning the problematic multi-pole response into an asset.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS7733180B1Amplifier for driving external capacitive loads
Publication Date: 2010.06.08 TEXAS INSTRUMENTS INC
  • US7733180B1 patent drawing
  • US7733180B1 patent drawing
  • US7733180B1 patent drawing

AI summary

An apparatus having a zero-pole that is dependant on an equivalent series resistance (ESR) and a load is provided. The apparatus comprises an amplifier stage that receives a first input voltage and a bias voltage, an intermediate stage that is coupled to the output node of the amplifier stage (where the intermediate stage outputs an intermediate voltage to an intermediate node), a first capacitor coupled between at least one of the internal transistors at an internal node and the intermediate node, a power transistor coupled between a second input voltage and the intermediate node, a second capacitor coupled between the internal node and the power transistor, and a feedback stage coupled to the intermediate node and to the amplifier stage. The amplifier stage also has an output node and includes a plurality of internal transistors. The second capacitor provides a third input voltage to the power transistor, and the ratio of the capacitance of the first capacitor to the capacitance of the second capacitor controls the position of the zero-pole. Additionally, the feedback stage is adapted to output an output voltage to a load, and wherein the feedback stage provides a feedback voltage to the amplifier stage.