Capacitive Memory Cell Destructive Read for Screening Charge
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Solution Overview
Problem
Conventional read operations for field-effect transistor based capacitive memory cells fail to accurately determine the memory state due to screening charges on the floating node, leading to indistinguishable current voltage characteristics between different memory states during retention time.
Innovation Solution
A destructive read operation is implemented, where the memory cell is written into a predefined state before reading, allowing for the determination of its initial state by switching or maintaining the memory cell in a specific state, thereby distinguishing between screened threshold voltage states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional read operation is performed on a field-effect transistor based capacitive memory cell during retention time, then the read operation can be executed, but the screening charges on the floating node cause the current voltage characteristics to become indistinguishable between different memory states, leading to inaccurate determination of the memory state
Solution Approach 1:
The patent applies preliminary action by performing a write operation to set the memory cell into a predefined state before the read operation. This preliminary write operation ensures that the memory cell is in a known state, allowing the subsequent read operation to accurately determine the initial state by detecting whether the cell switched states or remained in the same state, thereby overcoming the screening charge interference that makes direct reading inaccurate
2Productivity
If the memory cell is read directly without preliminary write operation, then the read operation is faster and simpler, but the screening charges obscure the actual memory state making accurate reading impossible
Solution Approach 1:
The patent uses an intermediary approach by introducing a predefined state as a reference point. The preliminary write operation establishes this intermediary state, and the read operation determines the initial memory state by comparing whether the cell switched from or remained in the initial state to the predefined state. This intermediary reference enables accurate information retrieval while maintaining operational efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables accurate identification of the memory state by ensuring the memory cell is in a known state during reading, overcoming the issue of screening charges that obscure the actual memory state in conventional read operations.
Implementation Method 1
a capacitive memory structure (120) coupled to a floating gate of the field-effect transistor structure
Implementation Method 2
a field-effect transistor structure (110), wherein the capacitive memory structure (120) is coupled to a floating gate of the field-effect transistor structure (110)
Data Source
AI summary
Various aspects relate to a memory cell arrangement including: a field-effect transistor based capacitive memory cell including a memory element, wherein a memory state of the memory element defines a first memory state of the field-effect transistor based capacitive memory cell and wherein a second memory state of the memory element defines a second memory state of the field-effect transistor based capacitive memory cell; and a memory controller configured to, in the case that a charging state of the field-effect transistor based capacitive memory cell screens an actual threshold voltage state of the field-effect transistor based capacitive memory cell, cause a destructive read operation to determine whether the field-effect transistor based capacitive memory cell was, prior to the destructive read operation, residing in the first memory state or in the second memory state.