Capacitive Sensing Circuit Using Time-Based Capacitance Readout
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing capacitive sensing circuits for fingerprint identification have complex circuit structures, large area requirements, high production costs, and high power consumption due to the use of analog-to-digital converters.
Innovation Solution
A capacitive sensing circuit that converts charge stored in a contact capacitor into a time signal using a sample-and-hold circuit, integrating circuit, comparator, and logic circuit, eliminating the need for an analog-to-digital converter and allowing determination of capacitance values based on integration time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If an analog-to-digital converter is used to convert the analog voltage signal into a digital voltage signal, then the fingerprint identification accuracy is improved, but the circuit structure becomes complex and the circuit area increases
Solution Approach 1:
The patent extracts and eliminates the analog-to-digital converter from the capacitive sensing circuit. Instead of converting the analog voltage signal to digital, the system directly processes the analog signal through a comparator that compares it with a reference voltage, outputting a digital-like binary result (high/low) that is sufficient for fingerprint identification. This removal of the ADC component significantly simplifies the circuit structure while maintaining identification functionality.
Solution Approach 2:
The patent inverts the conventional signal processing approach. Rather than converting analog to digital through an ADC, the system directly compares the analog voltage signal with a reference voltage using a comparator to generate a binary output. This inversion of the conversion process eliminates the need for complex ADC circuitry while achieving the necessary digital-like output for identification.
2Measurement precision
If an analog-to-digital converter is used to convert the analog voltage signal into a digital voltage signal, then the fingerprint identification accuracy is improved, but the production cost increases
Solution Approach 1:
The patent removes the analog-to-digital converter from the circuit, which is a costly component. By using a simple comparator circuit instead, the bill of materials is significantly reduced, leading to lower production costs per unit while maintaining the essential functionality for fingerprint identification.
Solution Approach 2:
The patent replaces the expensive ADC with a cheap comparator circuit that uses basic operational amplifiers and reference voltage sources. These components are significantly cheaper than ADCs and can be easily manufactured, thereby reducing the overall production cost of the fingerprint identification device.
3Measurement precision
If an analog-to-digital converter is used to convert the analog voltage signal into a digital voltage signal, then the fingerprint identification accuracy is improved, but the power consumption increases
Solution Approach 1:
The patent extracts and removes the power-hungry analog-to-digital converter from the circuit. The replacement comparator-based system consumes significantly less power because comparators are simple voltage comparison circuits that do not require the complex conversion processes and high current draw of ADCs, thereby reducing overall power consumption of the fingerprint identification device.
Solution Approach 2:
The patent employs low-power comparator circuits instead of high-power ADCs. The comparator uses minimal power to perform voltage comparison and generate binary output, making the overall system more energy-efficient and suitable for portable or battery-powered fingerprint identification applications.
4Ease of manufacture
If a simple circuit structure is adopted, then the production cost is reduced and power consumption is lowered, but the capability to accurately convert and process capacitance values is compromised
Solution Approach 1:
The patent changes the parameter being measured from capacitance value magnitude to voltage level comparison. Instead of accurately converting capacitance to a multi-bit digital value, the system converts capacitance to an analog voltage and then compares it with a reference voltage to determine if it exceeds a threshold. This parameter change from quantitative conversion to qualitative comparison maintains sufficient accuracy for identification while using a simple circuit.
Solution Approach 2:
The patent inverts the conventional approach of converting capacitance to precise digital values. Instead, it inverts the process by using a comparator to directly evaluate whether the capacitance-derived voltage meets a reference threshold, producing a binary decision output. This inversion eliminates complex conversion circuitry while maintaining the ability to accurately distinguish between different capacitance states for fingerprint identification.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in a simple circuit structure, reduced area, lower costs, and lower power consumption while accurately interpreting capacitance values for fingerprint identification.
Implementation Method 1
a first switch S1 having one end for receiving a positive voltage VDD and the other end coupled to the contact capacitor Cf; and a second switch S2 having one end coupled to the contact capacitor Cf and the other end coupled to the integrating input terminal
Implementation Method 2
an integrating capacitor CINT coupled between the amplifying input terminal and the amplifying output terminal; and a fourth switch S4 having one end coupled to the integrating capacitor CINT and the other end coupled to the amplifying output terminal
Implementation Method 3
the comparator comprises: a first input terminal coupled to the integrating output terminal; a second input terminal for receiving a reference voltage VREF; and a comparison output terminal for outputting a comparison output voltage VCMP
Data Source
Figure 1~2
AI summary
A capacitive sensing circuit (10) includes a sample-and-hold circuit (SH) coupled to a contact capacitor (Cf); an integrating circuit (100) coupled to the sample-and-hold circuit (SH); a comparator (comp) including a first input terminal coupled to the integrating circuit (100), a second input terminal for receiving a reference voltage (VREF), and a comparison output terminal for outputting a comparison output voltage (VCMP); a logic circuit (102) coupled to the comparison output terminal, where the logic circuit (102) outputs an integration time (TOUT) of the integrating circuit (100) when the comparison output voltage (VCMP) indicates that the comparator (comp) performs a transition, where the integration time (TOUT) correlates with a capacitance value of the contact capacitor (Cf).