Capacitive Pressure Sensor with Dielectric Substrate
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Solution Overview
Problem
Conventional capacitive pressure sensors face performance issues due to parasitic capacitance effects, which are difficult to mitigate using semiconductor substrates, limiting the design to either compactness or robustness, but not both, and restricting their application in achieving high resolution and full-scale range.
Innovation Solution
The use of a dielectric substrate, specifically sapphire, with a sacrificial layer patterned and partially removed to create a gap between electrodes, along with a diaphragm layer and cap-seal layer, allows for a compact pressure sensor design that reduces parasitic capacitance and enhances sensitivity, enabling a wide range of pressure sensing applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If semiconductor substrates are used for compact pressure sensor design, then device compactness is improved, but parasitic capacitance effects increase and performance deteriorates
Solution Approach 1:
The patent extracts the substrate material from conventional semiconductor to dielectric materials, removing the source of parasitic capacitance while maintaining the compact device structure. This substitution eliminates the harmful electrical interactions between substrate and electrode layers.
Solution Approach 2:
The patent employs composite material structures including dielectric substrates combined with specific electrode layer configurations and sacrificial layers. This multi-material approach optimizes both compactness and electrical performance by selecting materials with complementary properties.
2Object-generated harmful factors
If electrode separation is increased to reduce parasitic capacitance, then parasitic effects are reduced, but device compactness deteriorates
Solution Approach 1:
The patent changes the dielectric properties of the substrate material, transitioning from conductive/semiconductor materials with high parasitic capacitance to dielectric materials with low parasitic capacitance. This parameter change allows maintaining small electrode separations without suffering from parasitic effects.
3Device complexity
If semiconductor fabrication processes are used for complex pressure sensor design, then design complexity is handled, but device robustness and ease of manufacture deteriorate
Solution Approach 1:
The patent replaces complex semiconductor fabrication processes with simpler dielectric substrate processing methods. The manufacturing workflow is substituted from highly complex lithography and etching sequences to more robust dielectric layer deposition and patterning techniques, improving ease of manufacture while maintaining design capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a compact pressure sensor with reduced parasitic capacitance, achieving high resolution and a large full-scale range, suitable for various sensing applications, including position deflection, vibration detection, and impact sensing, while maintaining robustness and temperature stability.
Implementation Method 1
pressure sensors fabricated as microsensor devices may exhibit performance effects due to parasitic capacitance
Implementation Method 2
capacitive pressure sensor device including lower and upper electrodes
Data Source
AI summary
A capacitive sensor device is fabricated on a dielectric substrate. The capacitive sensor device may include multiple diaphragms that differ in shape and/or size. Each of the diaphragms is paired to upper and lower electrodes in included upper and lower electrode layers, respectively. The lower layer is on the dielectric substrate and couples the lower electrodes to a lower electrode terminal in parallel. The upper electrode layer is separated from the lower electrode layer by a gap defined by a removed sacrificial layer and couples the upper electrodes in parallel to an upper electrode terminal.


