Capacitive Sensor Interface Circuit Stray Capacitance Compensation
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Solution Overview
Problem
Conventional capacitive sensors integrated in semiconductor substrates face non-linearities and voltage offsets due to stray capacitances, leading to reduced sensitivity and measurement errors, especially when integrated in silicon substrates using CMOS technology of 0.18 μm or less, and existing solutions either require large components, high power consumption, or involve complex signal processing that is slow.
Innovation Solution
An electronic interface circuit for capacitive sensors that includes a charge transfer amplifier connected to a common electrode via a switching unit, a logic unit for digital processing, and a digital-analogue converter, using a dichotomy algorithm to quickly adapt digital measuring signals and remove voltage offsets, allowing for precise and quick digital output signal generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional electronic interface circuits are integrated in semiconductor substrates, then device integration is achieved, but non-linearities and voltage offsets occur due to stray capacitances
Solution Approach 1:
The patent extracts and separately measures the stray capacitance component from the total capacitance measurement. By performing a first measurement with the sensor in a known state to determine the stray capacitance, and then using this extracted value to compensate for subsequent measurements, the harmful effect of stray capacitance on measurement accuracy is eliminated while maintaining integrated circuit implementation
Solution Approach 2:
The patent changes the operational parameters of the electronic interface circuit by implementing a two-stage measurement process. The first stage measures stray capacitance under known conditions, and the second stage uses this information to correct the actual sensor measurements. This parameter-based compensation approach resolves the accuracy issue while keeping the circuit integrated
2Measurement precision
If digital signal processing is implemented to remove voltage offsets, then measurement accuracy improves, but processing time increases
Solution Approach 1:
The patent performs preliminary measurement of the stray capacitance and characterization of voltage offsets during the initialization phase or before actual measurements. By pre-determining these compensation values, the actual measurement process only requires simple arithmetic operations rather than complex real-time processing, thus improving accuracy without significantly increasing processing time
Solution Approach 2:
The patent replaces complex iterative digital signal processing algorithms with a simpler arithmetic compensation method. Instead of using time-consuming digital filters or optimization algorithms to remove offsets, the invention uses direct mathematical subtraction of pre-measured stray capacitance values and offset corrections, achieving the same accuracy goal with much faster processing
3Area of stationary object
If component size is reduced for integration, then device density increases, but sensitivity and gain are reduced due to stray capacitances
Solution Approach 1:
The patent implements a feedback mechanism where the measured stray capacitance value is fed back into the measurement system to compensate for its effect on sensitivity. By continuously monitoring and correcting for the stray capacitance impact, the system maintains high sensitivity even with compact component sizes, as the feedback loop actively counteracts the degrading effect of parasitic capacitances
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables the rapid supply of precise digital output signals, reduces component size and power consumption, and effectively eliminates voltage offsets, enabling accurate measurement of physical parameters like acceleration, force, or pressure with reduced redundancy in the electronic circuit.
Implementation Method 1
the capacitive sensor is formed of at least two differential connected capacitors... capable of moving between two fixed electrodes under the action, for example, of a force in order to alter the capacitive value of each capacitor
Implementation Method 2
a digital-analogue converter capable of supplying a measurement voltage to the electrodes via the switching unit, the measurement voltage being defined on the basis of a binary word conversion defining at least one of the digital measuring signals
Implementation Method 3
polarising the fixed electrode of the first capacitor at a regulated high voltage of a supply voltage source for the electronic circuit, and polarising the fixed electrode of the second capacitor at a low voltage of the supply voltage source
Data Source
AI summary
The measuring method is for measuring a physical parameter using an electronic interface circuit (1) for a capacitive sensor (2) with at least two capacitors (C1X, C2X) whose common electrode (CM) is mobile between the fixed electrodes. The electronic circuit includes an amplifier (4) connected to the common electrode (CM) by a switching unit (3), a logic unit (5) connected to the amplifier for supplying first and second digital measuring signals, and a digital-analogue converter (7) for supplying a measurement voltage (VDAC) to the electrodes on the basis of a conversion of one of the digital signals. The method consists in polarizing firstly the electrodes of the capacitors by the measurement voltage (VDAC) on the basis of the first digital signals, then polarizing the fixed electrode of the first capacitor (C1X) at a regulated voltage (VREG) and the fixed electrode of the second capacitor (C2X) at a low voltage (VSS), then polarizing the electrodes of the capacitors (C1X, C2X, CM) by the measurement voltage (VDAC) on the basis of the second digital measuring signal, and finally polarizing the fixed electrode of the first capacitor (C1X) at a low voltage (VSS) and the fixed electrode of the second capacitor (C2X) at a regulated voltage (VREG). At the end of the measuring cycles, the logic unit is able, on the basis of the first and second obtained digital measuring signals, to remove any voltage offset linked to the electronic components.