Capacitor Array Electrolytic Plating for Precise Outer Terminal Formation
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Solution Overview
Problem
Conventional methods for forming band-shaped outer terminal electrodes in multi-terminal electronic components, such as capacitor arrays, face challenges in precision, miniaturization, and reliability due to limitations in electroless plating, which can lead to solder bridges and reduced sealing between dielectric layers.
Innovation Solution
The use of electrolytic plating to form outer terminal electrodes with protrusion portions that control plating growth, preventing width expansion and maintaining precise distances between electrodes, while eliminating the need for dummy internal electrodes, thus enhancing reliability and sealing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If electroless plating is used to form outer terminal electrodes, then the plating film can be formed on exposed internal electrodes, but the plating film formation rate is low and the density of the resulting plating film is low
Solution Approach 1:
A catalyst layer is introduced as an intermediary between the substrate and the plating film. This catalyst layer enables the electroless plating reaction to proceed efficiently, providing nucleation sites for metal deposition and ensuring high-quality plating film formation with adequate density and formation rate.
Solution Approach 2:
The plating process parameters are optimized including catalyst layer thickness, plating solution composition, temperature, and deposition time to achieve both high formation rate and high film density. By controlling these parameters, the contradiction between speed and quality is resolved.
2Reliability
If electroless plating is used to form outer terminal electrodes, then the plating film can be formed, but the plating film may grow in width direction toward adjacent outer terminal electrodes, reducing distance between them
Solution Approach 1:
The catalyst layer is pre-formed with specific patterns and dimensions that define the boundaries of the outer terminal electrodes. This preliminary structure controls the lateral growth of the plating film, preventing it from encroaching on adjacent electrode areas and maintaining precise spacing.
Solution Approach 2:
The catalyst layer is applied selectively only in regions where outer terminal electrodes are needed, with varying thickness or presence to control local plating behavior. This ensures plating growth is confined to desired areas while maintaining precise distances between adjacent electrodes.
3Ease of manufacture
If dummy internal electrodes are formed between adjacent internal electrodes to facilitate continuous plating film formation, then plating can be facilitated, but the exposure area of internal electrodes increases, reducing sealing between dielectric layers
Solution Approach 1:
The function of dummy internal electrodes is extracted and replaced by a catalyst layer formed directly on the side surfaces of the capacitor. This eliminates the need for additional dummy electrodes that would compromise sealing, while still enabling continuous plating film formation through the catalyst's presence on exposed surfaces.
Solution Approach 2:
The catalyst layer serves as an intermediary that enables continuous plating without requiring dummy internal electrodes. It provides the necessary catalytic activity on exposed surfaces to ensure uniform and continuous metal deposition, maintaining both manufacturability and sealing integrity.
4Reliability
If electrically conductive paste is applied with width greater than exposure width to ensure distance between outer terminal electrodes, then solder bridge prevention is ensured, but miniaturization is limited
Solution Approach 1:
The mechanical application method of electrically conductive paste is replaced with electroless plating, a chemical deposition process. This substitution enables precise control of electrode width and spacing at the micrometer level, allowing miniaturization while maintaining adequate distances to prevent solder bridges through controlled catalyst layer patterning.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for high-precision, miniaturized outer terminal electrodes with reduced risk of solder bridges and improved sealing, leading to increased reliability and efficiency in capacitor array manufacturing.
Implementation Method 1
a first plating film directly connected to the first internal electrode, and a second plating film directly connected to the second internal electrode
Implementation Method 2
the electroless plating utilizes the principle that film formation is conducted by a chemical reaction in a plating solution
Data Source
AI summary
A capacitor array includes mutually opposed first and second internal electrodes having a first capacitance portion and a second capacitance portion, respectively, a first lead portion and a second lead portion, respectively, which are electrically connected to a first outer terminal electrode and a second outer terminal electrode, and a first protrusion portion and a second protrusion portion, respectively, which partially protrude toward the second outer terminal electrode and the first outer terminal electrode. The outer terminal electrodes have plating films directly connected to the internal electrodes. The plating film is formed by electrolytic plating. In the electrolytic plating, deposition of plating proceeds while being prevented from spreading in width directions of the individual side surfaces by electric fields generated from the protrusion portions toward the vicinities of exposure portions of the respective lead portions on the side surfaces.