Multilayer Capacitor Array ESR Control
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Solution Overview
Problem
Existing multilayer capacitor arrays face a conflict between increasing capacitance and equivalent series resistance (ESR), as higher capacitance leads to lower ESR due to increased number of lead conductors connected in parallel, making it difficult to meet demands for both higher capacitance and greater ESR simultaneously.
Innovation Solution
The multilayer capacitor array design includes a laminated body with internal electrodes connected through external connecting conductors on the surface, allowing for adjustable ESR by varying the number and position of lead conductors without changing the number of dielectric or internal electrode layers, and arranging internal electrodes with dielectric layers in between to enhance capacitance and control ESR effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of laminated dielectric layers and internal electrode layers is increased to enhance capacitance, then the electrostatic capacitance increases, but the ESR decreases due to increased number of lead conductors connected in parallel
Solution Approach 1:
The patent divides the internal electrodes into multiple groups (first internal electrode group with first and second internal electrodes, second internal electrode group with third and fourth internal electrodes) arranged side by side. Each group connects to terminal conductors through a limited number of lead conductors, segmenting the current path and preventing excessive parallel connections that would reduce ESR.
Solution Approach 2:
The patent applies different connection configurations to different electrode groups. The first internal electrodes connect to the first terminal conductor through lead conductors, while at least one first internal electrode also connects to the first external connecting conductor. This local variation in connection quality allows optimization of ESR for specific capacitor units within the array.
2Ease of manufacture
If all internal electrodes are directly connected to terminal conductors through lead conductors, then the manufacturing process is simplified, but the ESR becomes too small due to parallel resistance components
Solution Approach 1:
The patent introduces external connecting conductors as intermediary elements between internal electrodes and terminal conductors. The first external connecting conductor connects to the first terminal conductor and provides an additional current path that limits the number of parallel lead conductor connections, thereby maintaining appropriate ESR levels while still achieving high capacitance.
Solution Approach 2:
The patent utilizes the surface of the laminated body as an additional dimension for conductor arrangement. External connecting conductors are disposed on the surface and connect to side surfaces, creating a three-dimensional connection topology that reduces the number of lead conductors needed compared to traditional planar connections, thus maintaining higher ESR.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for controllable ESR and increased electrostatic capacitance, preventing sharp impedance drops at resonance frequencies and providing a wider bandwidth, while reducing short-circuiting and equivalent series inductance (ESL).
Implementation Method 1
a laminated body including a plurality of laminated dielectric layers and a plurality of external conductors disposed on the laminated body... At least one of the first internal electrodes and the second internal electrode are arranged as opposed with at least one of the dielectric layers in between... the first internal electrodes are electrically connected to the first external connecting conductor through lead conductors
Data Source
AI summary
At least one of a plurality of first internal electrodes and a second internal electrode are arranged as opposed with at least one of the dielectric layers in between. Third and fourth internal electrodes are arranged as opposed with at least one of the dielectric layers in between. The first internal electrodes are electrically connected to a first external connecting conductor through lead conductors. The second, third, and fourth internal electrodes are electrically connected to second, third, and fourth terminal conductors, respectively, through lead conductors. At last one but not all of the first internal electrodes are electrically connected to the first terminal conductor through a lead conductor.