Capacitor Array Simulation With Parasitic Resistance Modeling
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Solution Overview
Problem
Current capacitor simulation models in semiconductor memory are inaccurate, leading to large errors in simulation results.
Innovation Solution
A design method is provided for a capacitor array that involves acquiring unit simulation models, establishing a first simulation model based on the arrangement of preset capacitor units, creating a parasitic resistance equivalent test structure, and obtaining parasitic resistance to build a second simulation model, which improves the accuracy and reliability of semiconductor memory simulations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a simple capacitor simulation model is used, then the simulation process is fast and simple, but the simulation accuracy is low due to large errors
Solution Approach 1:
The simulation model is segmented into multiple components: unit simulation models for individual capacitors, first simulation model for capacitor arrays, and second simulation model that incorporates parasitic resistance. This segmentation allows each part to be optimized independently while maintaining overall accuracy.
Solution Approach 2:
A parasitic resistance equivalent test structure is introduced as an intermediary element to accurately model the parasitic resistance effects. This intermediary component bridges the gap between simple capacitor models and complex real-world behavior, enabling accurate simulation without excessive complexity.
2Reliability
If parasitic resistance is not considered, then the simulation model is simple, but the simulation results have large errors and low reliability
Solution Approach 1:
The parasitic resistance is extracted and modeled in advance through equivalent test structures before being integrated into the main simulation model. This preliminary action allows the complex parasitic effects to be pre-characterized and then easily incorporated, improving reliability without proportionally increasing overall complexity.
Solution Approach 2:
The parasitic resistance equivalent test structure creates a simplified copy or representation of the actual parasitic resistance behavior. This copy captures the essential characteristics of parasitic resistance effects while being computationally efficient to simulate, thereby improving reliability without excessive complexity.
Data Source
AI summary
A design method applied to a capacitor array is provided. The capacitor array includes multiple preset capacitor units, and each preset capacitor includes multiple unit capacitors. The method includes: acquiring unit simulation models of the preset capacitor units; acquiring a first simulation model of the capacitor array based on an arrangement manner of the preset capacitor units in the capacitor array and the unit simulation models of the preset capacitor unit; acquiring an arrangement direction of the preset capacitor units based on the arrangement manner, establishing a parasitic resistance equivalent test structure of a group of preset capacitor units in the same arrangement direction; obtaining a parasitic resistance of each preset capacitor unit based on the parasitic resistance equivalent test structure; and establishing a second simulation model representing the capacitor array based on the parasitic resistance of each preset capacitor unit and the first simulation model.