Thin Film Capacitor Asymmetric Edge Profile for Short Circuit Prevention

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing thin film capacitors face issues with short circuits and debris due to manufacturing tolerances and variations, particularly when dielectric layers project beyond electrode layers, leading to contact between adjacent electrodes and breakage during wet etching.

Innovation Solution

A multilayer thin film capacitor design where the peripheries of dielectric and electrode layers define an outer profile flaring toward the metal foil, with specific gap relationships (B>A>0) to prevent short circuits and reduce debris, achieved through alternating deposition and patterning of dielectric and conductive films using wet etching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the edges of dielectric layers are designed to be flush with the edges of electrode layers, then the capacitor structure is compact, but manufacturing tolerances cause dielectric edges to project and break into debris

Engineering Contradiction:
Improvecapacitor profileVSAvoidedge alignment accuracy
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The patent applies asymmetry by designing the dielectric layer edges to extend beyond the electrode layer edges, creating an asymmetric configuration. This intentional overhang compensates for manufacturing tolerances and prevents dielectric edge breakage during wet etching, as the protruding dielectric edges are supported by the underlying structure rather than being exposed and vulnerable to damage.

Inventive Principle:
Principle #4Asymmetry

2Manufacturing precision

If the electrode layer edge protrudes from the dielectric layer to prevent dielectric projection, then dielectric breakage is reduced, but unnecessary protrusion causes short circuits between adjacent electrodes

Engineering Contradiction:
Improveedge alignment accuracyVSAvoidshort circuit risk
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies local quality by creating different gap configurations at different locations. Specifically, the first gap (between dielectric and underlying electrode) is designed to be larger than the second gap (between electrode and adjacent electrode), providing local support to prevent dielectric breakage while maintaining adequate spacing to prevent short circuits between adjacent electrodes.

Inventive Principle:
Principle #3Local quality

3Productivity

If wet etching is used for manufacturing, then production efficiency is improved, but dielectric layers project and break into debris due to manufacturing variations

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidedge alignment accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies beforehand cushioning by designing an asymmetric gap structure where the first gap is larger than the second gap. This pre-configured asymmetric structure compensates for manufacturing variations that occur during wet etching, providing a buffer zone that prevents dielectric edge projection and breakage while maintaining electrode spacing to prevent short circuits.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively reduces the risk of short circuits and debris generation by controlling the gap relationships between dielectric and electrode layers, ensuring accurate patterning and minimizing edge protrusions during manufacturing.

Implementation Method 1

alternately depositing dielectric films and conductive films on a metal foil

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 2

processing the resulting stack by ion milling from the topmost layer which is the farthest from the metal foil, for tapering

Methodology Applied
Scientific EffectWet etching:

Data Source

PatentUS8997321B2Method of manufacturing a thin film capacitor having separated dielectric films
Publication Date: 2015.04.07 TDK CORP
  • US8997321B2 patent drawing
  • US8997321B2 patent drawing
  • US8997321B2 patent drawing

AI summary

A thin film capacitor and a method of manufacturing the same are provided. The thin film capacitor includes a metal foil, dielectric layers and internal electrode layers alternately disposed on the metal foil, and a top electrode layer on the topmost layer among the two or more dielectric layers. These layers have peripheries that define an outer profile flaring toward the metal foil as viewed from the stacking direction of the thin film capacitor, and at least one dielectric layer of two or more dielectric layers satisfies a relationship B>A>0 wherein A is a gap of the periphery of the internal electrode layer directly below the dielectric layer protruding from the periphery of the dielectric layer, and B is a gap of the periphery of the dielectric layer protruding from the periphery of the internal electrode layer or the top electrode layer directly above the dielectric layer. The thin film capacitor has a structure free from short-circuiting and reducing debris of broken dielectric material.