Semiconductor Capacitor Bottom Electrode Conformal Coverage

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Solution Overview

Problem

As semiconductor devices become more highly integrated with increasing line width and height, they face challenges in layer deposition, etching uniformity, and reliability due to increased complexity.

Innovation Solution

The semiconductor device design includes specific insulating patterns, contact pads, and capacitors with a bottom electrode structure that extends along the inner sidewall of holes, providing improved connectivity and reliability through a method of manufacturing that involves forming insulating patterns, contact plugs, and sacrificial patterns to create a conformal bottom electrode layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If integration density is increased with smaller line width and greater height, then device functionality and capacity are improved, but manufacturing precision and reliability deteriorate

Engineering Contradiction:
Improveintegration densityVSAvoidlayer deposition uniformity
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming sacrificial patterns before forming the bottom electrode. These sacrificial patterns are deposited and etched in advance to create precisely positioned openings that guide subsequent electrode formation, ensuring manufacturing precision is maintained despite increased integration density requirements

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses sacrificial patterns as intermediary structures that facilitate the formation of the bottom electrode. These temporary structures serve as mediators between the insulating patterns and the final electrode geometry, enabling precise control over electrode shape and position during the manufacturing process

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If integration density is increased with smaller line width and greater height, then device functionality are improved, but etching uniformity deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoidetching uniformity
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The sacrificial patterns are formed in advance with controlled thickness and material composition to serve as etch masks. This preliminary structuring enables uniform etching of the bottom electrode by providing consistent geometric constraints across all capacitor structures, maintaining etching uniformity despite high integration density

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes material parameters by selecting sacrificial pattern materials with specific etch selectivity relative to surrounding layers. This parameter adjustment allows differential etching that maintains uniformity across the device structure while accommodating smaller line widths and greater heights required for high integration density

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If integration density is increased, then device capacity is improved, but reliability deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoiddevice reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The sacrificial patterns are formed and precisely positioned before bottom electrode deposition. This preliminary structuring ensures that the bottom electrode is formed with accurate geometry and proper connection to contact pads, reducing manufacturing defects and improving device reliability despite increased integration density

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The sacrificial patterns act as intermediary structures that ensure reliable formation of the bottom electrode. By providing controlled templates for electrode deposition, these intermediaries reduce variability in electrode quality and connectivity, thereby maintaining reliability as integration density increases

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10008505B2Semiconductor device including capacitor and method of manufacturing the same
Publication Date: 2018.06.26 SAMSUNG ELECTRONICS CO LTD
  • US10008505B2 patent drawing
  • US10008505B2 patent drawing
  • US10008505B2 patent drawing

AI summary

A method for manufacturing a semiconductor device may include forming contact pads spaced apart from each other in a first direction on a substrate and between first insulating patterns; forming first holes between the first insulating patterns and having bottom ends adjacent top surfaces of the contact pads; forming second holes between second insulating patterns and overlapping with partial portions of the first holes in a second direction perpendicular to the first direction; and forming a bottom electrode layer including first portions to cover the bottom ends of the first holes and sidewalls of the second holes. In forming the first and second holes, the first and second holes are formed simultaneously.