Capacitor Charge Pump Circuit for Voltage Step-Down and Current Multiplication
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Solution Overview
Problem
Existing DC-to-DC power conversion circuits, such as Buck converters, primarily focus on voltage conversion and do not efficiently utilize battery current in portable devices, leading to suboptimal battery life.
Innovation Solution
A capacitor-based voltage conversion circuit with time domain feedback that generates a clock signal, utilizing a charge pump circuit and comparator to control the clock signal generation, effectively stepping down voltage while increasing current, thereby preserving battery life in portable electronics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a Buck converter is used for DC-to-DC power conversion, then voltage conversion is achieved, but current multiplication is not realized and battery efficiency is suboptimal
Solution Approach 1:
The patent changes the operating parameters of the power conversion circuit by using switched capacitor banks instead of traditional inductor-based Buck converter topology. The capacitor banks are switched in series and parallel configurations to achieve both voltage step-down and current multiplication simultaneously, improving battery efficiency while enabling current multiplication capability.
Solution Approach 2:
The patent replaces the mechanical/inductor-based energy storage and transfer mechanism with an electrical/capacitor-based switching mechanism. By using MOSFETs to switch capacitor banks between series and parallel configurations, the system achieves power conversion without relying on inductive elements, thereby enabling both voltage reduction and current multiplication.
2Power
If traditional voltage conversion circuits are used, then voltage transformation is achieved, but current capability is not optimized for portable battery operation
Solution Approach 1:
The patent introduces dynamic switching of capacitor configurations based on the operational requirements. The MOSFETs dynamically reconfigure the capacitor banks between series and parallel connections during different phases of the switching cycle, enabling the circuit to adaptively optimize both voltage conversion and current capability utilization for portable battery operation.
Solution Approach 2:
The patent employs periodic switching of the capacitor banks at a defined frequency to achieve continuous power conversion. The periodic switching between series and parallel configurations allows the circuit to maintain efficient voltage transformation while continuously utilizing the battery's current capability, preventing energy waste and optimizing portable device operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The circuit efficiently converts DC power from a battery with a high voltage to a lower voltage with increased current, enhancing battery life by accurately controlling the voltage and current ratios through the charge pump and feedback mechanisms.
Implementation Method 1
a capacitor based charge pump circuit for receiving the clock signal and an input voltage signal having an input current and generates an output voltage signal, less than the input voltage signal and an output current greater than the input current
Data Source
AI summary
A time domain voltage step down capacitor based circuit has an oscillating circuit for generating a clock signal. The circuit also has a capacitor based charge pump circuit for receiving the clock signal and an input voltage signal having an input current and generates an output voltage signal, less than the input voltage signal and an output current greater than the input current. The circuit further comprises a comparator circuit for receiving the output voltage signal, as a first input signal thereto, and a reference voltage signal as a second input signal thereto and compares the first input signal to the second input signal and generates a control signal in response thereto. Finally the control signal is supplied to the oscillating circuit to control the generating of the clock signal.