Laminated Capacitor Chip Resin Encapsulation Thickness Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Laminated solid electrolytic capacitors face limitations in increasing capacitance due to defects such as pinholes or weld lines in the resin encapsulation, restricting the total thickness of the laminated capacitor elements.

Innovation Solution

The method involves laminating capacitor elements on a metal lead frame and encapsulating the resulting structure with resin, ensuring specific thickness and distance ratios (Hc−Hs ≥ 0.1 mm, Dt/Db between 0.1 to 9, and both Dt and Db ≥ 0.02 mm) to minimize defects and maintain high capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the total thickness of laminated capacitor elements is increased to increase capacitance, then the capacitance increases, but defects in appearance such as pinholes or weld lines in the resin encapsulation are likely to occur

Engineering Contradiction:
ImprovecapacitanceVSAvoidappearance quality
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The invention changes the geometric parameters of the encapsulation structure by defining specific relationships between the thickness of the laminated body (Hs), the thickness of the capacitor chip (Hc), and the distances from the top and bottom of the laminated body to the resin surfaces (Dt and Db). By controlling these parameters within specific ranges (Hc-Hs ≥ 0.1mm, Dt/Db between 0.1-9, Dt and Db both ≥ 0.02mm), the invention resolves the contradiction between increasing capacitance through greater thickness and maintaining appearance quality by preventing resin defects.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If the thickness of the laminated body is increased to increase capacitance, then the capacitance increases, but the capacitor elements become readily exposed from the encapsulating resin

Engineering Contradiction:
ImprovecapacitanceVSAvoidencapsulation integrity
Core Design Contradiction:
Quantity of substanceVSShape

Solution Approach 1:

The invention controls the geometric parameters of the encapsulation structure to ensure that the distances from the top and bottom of the laminated body to the resin surfaces (Dt and Db) both exceed 0.02mm, with their ratio Dt/Db between 0.1-9. This parameter control ensures that even when the laminated body thickness increases for higher capacitance, the elements remain properly embedded in the resin without exposure, maintaining encapsulation integrity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7957120B2Capacitor chip and method for manufacturing same
Publication Date: 2011.06.07 MURATA MFG CO LTD
  • US7957120B2 patent drawing
  • US7957120B2 patent drawing

AI summary

The present invention relates to a capacitor chip and a solid electrolytic capacitor, wherein in a capacitor chip in which one or more capacitor element is laminated on a metal lead frame to carry electricity and the whole is encapsulated with resin, a laminated body is located within a certain definite range. The present invention enables to increase the capacitance of a capacitor by broadening the allowable range of the total thickness of the laminated capacitor chips without generating defective appearance of the laminated solid electrolytic capacitor.