Capacitor Structures With Common Electrode For Compact Decoupling
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Solution Overview
Problem
Semiconductor devices with multiple decoupling circuits increase in size, posing a challenge in compact design and efficient noise reduction, as existing capacitor structures are not optimized for minimal size and effective noise decoupling.
Innovation Solution
The integration of a decoupling structure with a first and second capacitor, supported by a unitary conductive pattern structure and a common electrode, where the conductive patterns are vertically oriented and horizontally spaced, with a supporting structure that includes openings and a capacitor dielectric layer, allowing for compact design and efficient noise reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If multiple decoupling circuits are included in a semiconductor device, then noise reduction capability is improved, but device size increases
Solution Approach 1:
Multiple decoupling circuits are integrated into a single unitary decoupling structure that shares common electrodes and supporting structures. The first and second decoupling circuits are combined such that they share a common first electrode structure and common supporting framework, reducing the total area required while maintaining the noise reduction functionality of multiple capacitors
Solution Approach 2:
The common first electrode structure and common supporting structure serve multiple functions simultaneously: they act as electrodes for both the first and second capacitors, provide structural support for multiple conductive pattern structures, and reduce the overall component count. This multi-functionality allows multiple decoupling circuits to be implemented in a compact footprint
2Area of stationary object
If capacitor structures are made compact, then device area is reduced, but manufacturing complexity increases
Solution Approach 1:
The decoupling structure is divided into distinct functional regions: conductive pattern structures with capacitor dielectric layers forming first capacitors, additional conductive patterns forming second capacitors, and common electrodes serving both capacitors. This segmentation allows for systematic fabrication while achieving compact integration
Solution Approach 2:
The patent utilizes vertical stacking in the thickness direction to achieve compact horizontal footprint. Multiple capacitor structures are arranged in layers with common electrodes shared between layers, effectively using the third dimension (vertical direction) to reduce the two-dimensional area while maintaining manufacturability through standard layered fabrication processes
Data Source
AI summary
Decoupling structures are provided. The decoupling structures may include first conductive patterns, second conductive patterns and a unitary supporting structure that structurally supports the first conductive patterns and the second conductive patterns. The decoupling structures may also include a common electrode disposed between ones of the first conductive patterns and between ones of the second conductive patterns. The first conductive patterns and the common electrode are electrodes of a first capacitor, and the second conductive patterns and the common electrode are electrodes of a second capacitor. The unitary supporting structure may include openings when viewed from a plan perspective. The first conductive patterns and the second conductive patterns are horizontally spaced apart from each other with a separation region therebetween, and none of the openings extend into the separation region.