Semiconductor Capacitor Contact Depth Reduction
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Solution Overview
Problem
In semiconductor devices, as the height of capacitors increases to enhance electrostatic capacitance, the depth of metal contacts becomes deeper, reducing the etching margin and contact area, which deteriorates the capability to provide power to plate electrodes.
Innovation Solution
A semiconductor device and method that form a metal contact with a reduced depth and increased contact area by using a first plate electrode, a second plate electrode, and a contact plug, where the insulation film is formed outside the cell region with a lower highest point than the first plate electrode, allowing for a larger critical dimension and easier power source application.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the height of capacitor increases to increase electrostatic capacitance, then the electrostatic capacitance is improved, but the depth of metal contact becomes deeper and the contact area is reduced
Solution Approach 1:
The patent transitions from a conventional planar capacitor structure to a three-dimensional cylindrical capacitor structure. The plate electrode is formed as a cylindrical shape surrounding the storage node, increasing the effective surface area for capacitance without increasing the vertical height of the capacitor, thereby maintaining adequate contact area while achieving higher electrostatic capacitance.
Solution Approach 2:
The patent implements a nested structure where the plate electrode is formed as a cylindrical shell surrounding the storage node. This nested configuration allows the plate electrode to wrap around the storage node multiple times or extend along its length, effectively increasing the contact area and electrostatic capacitance within a compact vertical space, avoiding the need to increase capacitor height.
2Quantity of substance
If the height of capacitor increases to increase electrostatic capacitance, then the electrostatic capacitance is improved, but the etch margin is reduced
Solution Approach 1:
By adopting a cylindrical capacitor structure, the patent increases capacitance through lateral expansion rather than vertical height increase. This dimensional change maintains a reasonable aspect ratio for etching processes, ensuring adequate etch margin while achieving the required electrostatic capacitance through the cylindrical geometry of the plate electrode.
3Length of stationary object
If the depth of metal contact becomes deeper, then the capacitor height can be maintained, but the capability of providing power source to plate electrode is deteriorated
Solution Approach 1:
The cylindrical plate electrode structure extends the contact interface laterally along the storage node, compensating for the reduced vertical contact depth. This lateral extension in the radial dimension maintains adequate contact area between the metal contact and plate electrode, ensuring reliable power source capability without requiring excessive contact depth.
Solution Approach 2:
The patent forms the plate electrode as a cylindrical structure that pre-establishes an extended contact interface with the storage node before subsequent processing steps. This preliminary configuration ensures that adequate contact area is already in place, maintaining power source capability regardless of variations in metal contact depth during fabrication.
Data Source
AI summary
A semiconductor device is disclosed, which reduces the depth of a metal contact so that an etching margin is increased in forming a contact hole. In addition, the semiconductor device and the method for forming the same increase a contact area between a plate electrode and a metal contact so that a power source can be more easily provided to the plate electrode. Thus, a sensing noise is reduced and a process margin is improved, resulting in improvement of device operation characteristics.