Capacitor-Coupled Image Sensor ADC Comparator for Inversion Artifacts
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Solution Overview
Problem
Conventional analog-to-digital converters (ADCs) in image sensors face high power consumption and introduce undesirable distortions due to comparator artifacts, particularly during inversion operations.
Innovation Solution
The imaging device incorporates a comparator configuration with specific capacitor and transistor arrangements to reduce power consumption and artifacts, featuring a first capacitor for the pixel signal, a second capacitor for the reference signal, and transistors with controlled gate voltages to manage the comparison process efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional ADC comparators are used to perform analog-to-digital conversion, then the conversion function is achieved, but power consumption becomes excessively large
Solution Approach 1:
The comparator is divided into two operational modes: a first mode for normal conversion operations and a second mode for inversion operations. This segmentation allows the circuit to optimize power consumption by activating only the necessary components for each operation type, while maintaining conversion accuracy through mode-specific optimization paths.
Solution Approach 2:
The comparator dynamically switches between two operational modes based on the conversion requirements. The first mode uses the full comparator circuitry for standard operations, while the second mode activates a simplified path with reduced power consumption for inversion operations, allowing the system to adapt its power usage to the specific task at hand.
2Productivity
If inversion operations are performed in conventional comparators, then the conversion process continues, but undesirable artifacts and distortions are introduced in the output signals
Solution Approach 1:
The invention extracts and isolates the inversion operation into a separate second mode with dedicated circuit paths. By taking the inversion function out of the standard comparator path and handling it through a specialized mode, the harmful artifacts are prevented from contaminating the main conversion signal flow, while conversion continuity is maintained through seamless mode switching.
Solution Approach 2:
A mode selection mechanism acts as an intermediary that directs inversion operations through a specialized processing path. This intermediary prevents the artifacts generated during inversion operations from affecting the main conversion pipeline, allowing both conversion continuity and artifact reduction to coexist by mediating between different operational requirements.
3Speed
If the comparator circuit operates continuously to maintain conversion readiness, then conversion speed is maintained, but power consumption increases
Solution Approach 1:
The comparator operates periodically by switching between active conversion modes and low-power standby modes. The first mode is activated only when conversion operations are required, while the second mode handles inversion operations with reduced power consumption. This periodic activation pattern maintains conversion speed when needed while significantly reducing average power consumption during idle or inversion periods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces power consumption and minimizes distortion in the comparator's signals during inversion operations, enhancing the performance of the ADC in image sensors.
Implementation Method 1
a first capacitor configured to receive the pixel signal
Implementation Method 2
a second capacitor configured to receive a reference signal
Implementation Method 3
a first transistor having a gate coupled to the node, a second transistor coupled to the first transistor
Data Source
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Figure 3
AI summary
Provided is an image sensor including: a pixel section configured to include a plurality of pixels arranged therein; and an AD conversion unit configured to perform analog-to-digital (AD) conversion on a pixel signal on the basis of a result of comparison between a first voltage of a signal, which is obtained by adding, via capacitances, the pixel signal of the pixel and a reference signal that linearly changes in a direction opposite to the pixel signal, with a second voltage serving as a reference.