Capacitor DAC Layout for Lower-Load SAR ADC Conversion
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Solution Overview
Problem
Existing successive approximation type A/D conversion circuits face challenges in reducing the load on the driver circuit and eliminating the need for additional components like step-up circuits or reference voltage sources, which can increase complexity and power consumption.
Innovation Solution
The A/D converter employs a capacitor type DAC with a switch array and a control circuit that distributes charge accumulation during sampling and successive approximation periods, using a DC voltage source and shared charge supply to minimize driver load and eliminate the need for step-up circuits or constant reference voltage sources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a capacitor type DAC is used with conventional charge supply method, then the A/D conversion function is achieved, but the driver circuit load increases and additional components (step-up circuits or reference voltage sources) are required
Solution Approach 1:
The patent merges the charge supply function into the capacitor array structure itself by connecting capacitors in series between signal wirings, eliminating the need for separate step-up circuits or reference voltage sources. This integration reduces device complexity while distributing the driver load across multiple capacitors during sampling and successive approximation periods
Solution Approach 2:
The capacitor array serves multiple functions: it acts as both the storage element for analog-to-digital conversion and the charge supply mechanism. By utilizing the capacitors' inherent charge storage capability during different operational phases (sampling period and successive approximation period), the circuit eliminates dedicated reference voltage sources and step-up circuits, reducing overall device complexity
2Measurement precision
If additional components like step-up circuits or reference voltage sources are added, then the A/D conversion accuracy is maintained, but power consumption increases
Solution Approach 1:
The capacitor array performs self-service by internally managing charge distribution during different operational phases. During the sampling period, capacitors accumulate charge from the input signal, and during the successive approximation period, they release and redistribute this charge to generate the necessary voltage levels for comparison. This self-managed charge supply eliminates power-hungry external components while maintaining conversion accuracy
Solution Approach 2:
The circuit employs periodic action by alternating between sampling period and successive approximation period. During the sampling period, capacitors charge from the input signal; during the successive approximation period, they discharge and redistribute charge to enable bit-by-bit conversion. This periodic charge accumulation and release maintains precision while avoiding continuous power consumption of external reference sources
3Ease of operation
If charge supply is centralized rather than shared, then the circuit operation is simplified, but the driver load increases and miniaturization is limited
Solution Approach 1:
The patent segments the charge supply function across multiple capacitors in the array rather than using a centralized supply. Each capacitor independently stores and releases charge during different phases of the conversion process, distributing the driver load across multiple elements. This segmentation maintains operational simplicity through unified control while reducing peak driver requirements and enabling miniaturization
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the load on the driver circuit, enables miniaturization, and saves power by sharing charge supply, while also eliminating the need for additional components, thus enhancing efficiency and reducing the required gain-bandwidth product.
Implementation Method 1
a capacitor array (11) including a plurality of capacitors
Data Source
AI summary
A successive approximation type A/D conversion circuit includes a capacitor type DAC and configured to convert an analog input signal into a digital output signal, and the capacitor type DAC includes a capacitor array including a plurality of capacitors, and a switch array configured to selectively apply a first reference voltage, a second reference voltage higher than the first reference voltage, or the analog input signal individually to a first end of each of the plurality of capacitors, one or more capacitors among the plurality of capacitors belonging to a first type capacitor, the other capacitors among the plurality of capacitors belonging to a second type capacitor, a second end of the first type capacitor being connected to a first signal wiring, and a second end of the second type capacitor being connected to a second signal wiring.